TIMA laboratory

PhD thesis defenses


« Time-to-digital Conversion based on a Self-Timed Ring Oscillator ».

Candidate: A. El Hadbi

Advisor: L. Fesquet

President of jury: S. Basrour

PhD: These de Doctorat, Université Grenoble Alpes

Speciality: Nanoélectronique et Nanotechnologies

Defense: November 20th, 2019 - 14:00 MINATEC - Amphi Z108

Abstract

Time-to-digital converters (TDCs) have become unavoidable in systems incorporating high precision time measurements. They are used in many application fields such as high-energy physics, metrology, telecommunications and satellite positioning. Fully digital approaches are today adopted to benefit from low-power and small circuit area. This thesis proposes a new TDC architecture based on a Self-Timed Ring (STR) oscillator, which is able to provide a very high resolution without averaging. Indeed, the proposed TDC virtually achieves a time resolution as fine as desired by simply increasing the STR oscillator number of stages. In fact, the STR is a multi-phase oscillator, which is able to provide one phase per stage output. The TDC exploits these different STR phases, which are evenly-spaced thanks to the unique analog STR properties. Thus, a regular time base can be extracted from this STR oscillator and applied for time measurement. This thesis demonstrates the advantages of such a TDC in terms of precision, calibration, low-cost and for on-the-fly measurements. It also states the TDC limits due to the STR jitter. After a first implementation on an FPGA, an ASIC prototype has been designed, fabricated and tested for validating this new class of TDC.

 

« On control approaches for estimation purposes - Application to tunneling current and magnetic levitation processes ».

Candidate: A. Popescu

Advisor: G. Besançon

President of jury: P. Lutz

PhD: These de Doctorat, Université Grenoble Alpes

Speciality: Systèmes Automatiques et Microélectroniques

Defense: November 25th, 2019 - 10:30 GIPSA Lab - Salle Mont-Blanc

Abstract

This PhD thesis gathers its main contributions in the field of observers for dynamical systems, originally motivated by applications in MEMS or NEMS (Micro or Nano Electromechanical Systems), with a more particular case related to tunneling current. It also happened to consider experiments with a magnetic levitation system.

Contributions of this PhD thesis are of two types, according to its two main parts:
1. Methodological part: designing different control strategies to obtain observers using the control-based paradigm. In particular, we focused on non-optimal approaches (like Proportional and Proportional-Integral), optimal ones (Linear Quadratic Regulator and Linear Quadratic Integrator) and sub-optimal methods (Hinf controller). Moreover, we focus on the main two ways to formulate a control (tracking) problem, namely Error feedback regulation problem and Full information regulation problem.
2. Experimental part: Applying the obtained methods for improving the topographic imaging using a Scanning-Tunneling Microscope as well as to improve the disturbance estimation for a magnetic levitation process.

More precisely, each part will take the form of two chapters:
1. Chapter II, dedicated to a formal introduction and contributive discussion about the ’control based observer’ approach this PhD investigates, and Chapter III, focusing on the use of such an approach for the purpose of new robust observer design in particular within an Hinf framework.
2. Chapter IV, related to STM application, and chapter V, presenting the MAGLEV case.
A final chapter VI summarizes the main conclusions of this work as well as some perspectives.

 

« Electromagnetic spectrum control of asynchronous digital circuits ».

Candidate: S. Germain

Advisor: L. Fesquet

President of jury: L. Hébrard

PhD: These de Doctorat, Université Grenoble Alpes

Speciality: Nanoélectronique et Nanotechnologies

Defense: November 25th, 2019 - 10:00 MINATEC - Amphi M001

Abstract

Electromagnetic Compatibility has become a major issue for the digital designers. Several techniques exist qualitatively reducing the electromagnetic emissions of synchronous circuits. Nevertheless, the clocked activity produces strong periodic current pulses on the power supply, generating harmonics in the electromagnetic spectrum. Contrarily, asynchronous designs, also known as clockless circuits, show a spread electromagnetic spectrum without harmonics. We have developed a design flow in order to shape the electromagnetic spectrum and meet electromagnetic compatibility standards. Our method only applies to asynchronous circuits. A static timing analysis is performed to extract the delays of the control path that guarantee the timing assumptions. This analysis is used to annotate the circuit model in a fast analog simulator, which was specifically developed to extract its current consumption. Thanks to this simulator and a Fast Fourier Transform, it is possible to get the electromagnetic spectrum. A genetic algorithm is then used to create delay combinations shaping the spectrum in order to match the targeted spectral mask. Electromagnetic measurements on a test chip, manufactured in STMicroelectronics CMOS 40nm technology, have shown that our method allows controlling the electromagnetic field of the circuit.

 

« Distributed Body-Bias Micro-Generators for an activity-driven power management in FD-SOI Technologies ».

Candidate: O. Rolloff

Advisor: L. Fesquet

President of jury: B. Allard

PhD: These de Doctorat, Université Grenoble Alpes

Speciality: Nanoélectronique et Nanotechnologies

Defense: December 3rd, 2019 - 10:00 MINATEC - Amphi Z108

Abstract

With the exponential growth of the embedded systems and the so-called IoT objects, the need of reducing power consumption for environmental and economic considerations requires better power-saving techniques without compromising circuit performances. However, CMOS transistors are achieving their physical limits in terms of scaling and the opportunities to enhance the integrated circuit will be more on the design side than on the technology side. Thereto, it is noticeable that complex digital circuits spent a significant amount of energy during idle periods and tend to activate much more blocks than needed. This drawback results from the usage of the synchronous paradigm. Asynchronous circuits provide intrinsic and local signals that mitigate the unnecessary block activation in circuits and offers an intrinsic idle mode. Moreover, these signals are usable to locally manage body-bias voltages in Fully Depleted Silicon On Insulator (FD-SOI) in order to save power. This thesis proposes a design strategy dedicated to asynchronous circuits exploiting the body-biasing facilities of the FD-SOI technology. Firstly, an analysis of the FD-SOI technology has been made in order to analyze the new degrees of freedom offered to the designers by mainly controlling the transistor threshold voltage (Vth) thanks to body-biasing effect. This latter is indeed able to change the transistor speed and power consumption. Secondly, a body-biasing standard cell based on a level shifter architecture has been designed in order to locally adapt the body-biasing voltage. Thirdly, we proposed a distributed activity-driven strategy easily managing a large number of Body-Biasing Domains (BBDs). Lastly, the aforementioned techniques have been implemented and tested in a chip designed in 28 nm FD-SOI technology from St Microelectronics.

 

« Development of Built-In Self-Test solutions for RF/mm-wave integrated circuits ».

Candidate: F. Cilici

Advisor: S. Mir

President of jury: T. Parra

PhD: These de Doctorat, Université Grenoble Alpes

Speciality: Micro et Nano Electronique

Defense: December 17th, 2019 - 10:30 VIALLET - Amphi Gosse

Abstract

Recent silicon technologies are especially prone to imperfections during the fabrication of the circuits. Process variations can induce a noticeable performance shift, especially for high frequency devices. In this thesis we present several contributions to tackle the cost and complexity associated with testing mm-wave ICs. In this sense, we have focused on two main topics: a) non-intrusive machine learning indirect test and b) one-shot calibration. We have in particular developed a generic method to implement a non-intrusive machine learning indirect test based on process variation sensors. The method is aimed at being as automated as possible and can be applied to virtually any mm-wave circuit. It leverages the Monte Carlo models of the design kit and the BEOL variability information to propose a set of non-intrusive sensors. Low frequency measurements can be performed on these sensors to extract signatures that provide relevant information about the process quality, and consequently about the device performance. The method is supported by experimental results in a set of 65 GHz PAs designed in a 55 nm technology from STMicroelectronics. To further tackle the performance degradation induced by process variations, we have also focused on the implementation of a one-shot calibration procedure. In this line, we have presented a two-stage 60 GHz PA with one-shot calibration capability. The proposed calibration takes advantage of a novel tuning knob, implemented as a variable decoupling cell. Non-intrusive process monitors, placed within the empty spaces of the circuit, are used for predicting the best tuning knob configuration based on a machine learning regression model. The feasibility and performance of the proposed calibration strategy have been validated in simulation.