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410 results

   50 International journals
    4 Patents
   38 Invited conference talks
  172 International conferences
   15 Book chapters
   13 Books & Edited Publications
    1 National journals
   41 National conferences
   18 Other communications
   25 Reports
   33 PhD theses

50 International journals

 1 Sharma E., Saadi A., Barragan M., Pistono E., Margalef-Rovira M., Lisboa de Souza A.A., Ferrari P., Bourdel S., Design of a 77-GHz LC-VCO With a Slow-Wave Coplanar Stripline-Based Inductor, IEEE Transactions on Circuits and Systems, Ed. IEEE, Vol. , pp. 1-11, DOI: 10.1109/TCSI.2019.2926415, July 2019
 
 2 Bounceur A., Mir S., Euler R., Beznia K., Estimation of Analog/RF Parametric Test Metrics Based on a Multivariate Extreme Value Model (Early Access), IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Ed. IEEE, Vol. , DOI: 10.1109/TCAD.2019.2907923, March 2019
 
 3 Silveira Feitoza R., Barragan M., Dzahini D., Mir S., Reduced-code static linearity test of split-capacitor SAR ADCs using an embedded incremental Sigma-Delta converter, IEEE Transactions on Device and Materials Reliability, Vol. 19, No. 1, pp. 37-45, DOI: 10.1109/TDMR.2019.2891298, March 2019
 
 4 Renaud G., Diallo M., Barragan M., Mir S., Fully-differential 4 V-output range 14.5-ENOB step-wise ramp stimulus generator for on-chip static linearity test of ADCs, IEEE Transactions on Very Large Scale Integration (VLSI) Systems , Ed. IEEE, Vol. 27, No. 2, pp. 281-293, DOI: 10.1109/TVLSI.2018.2876976, February 2019
 
 5 Tchuani Tchakonte D., Simeu E., Thuente M., Lifetime optimization of wireless sensor networks with sleep mode energy consumption of sensor nodes, Wireless Networks, Ed. Springer , Vol. , pp. 1-10, DOI: 10.1007/s11276-018-1783-3, July 2018
 
 6 Malloug H., Barragan M., Mir S., Practical Harmonic Cancellation Techniques for the On-Chip Implementation of Sinusoidal Signal Generators for Mixed-Signal BIST Applications, Journal of Electronic Testing: Theory and Applications, Ed. Springer , Vol. 34, No. 3, pp. 263-279, DOI: 10.1007/s10836-018-5720-2, June 2018
 
 7 Youssoufa M., Foutse M., Lealea T., Njike Kouekeu L. C., Tueche F., Simeu E., Accuracy enhancement in low frequency gain and phase detector (AD8302) based bioimpedance spectroscopy system, Measurement, Vol. 123, pp. 304-308, March 2018
 
 8 Nzebop Ndenoka G., Simeu E., Alhakim R., Efficient controller synthesis of multi-energy systems for autonomous domestic water supply, Revue Africaine de la Recherche en Informatique et Mathématiques Appliquées (INRIA), Vol. 24, pp. 65-88, DOI: hal-01309417, 2017
 
 9 Takam Tchendjou G., Simeu E., Alhakim R., Fuzzy Logic Based Objective Image Quality Assessment with FPGA Implementation, Journal of Systems Architecture (JSA), Ed. Elsevier, Vol. 82, pp. 24-36, DOI: 10.1016/j.sysarc.2017.12.002, December 2017
 
10 Leger G., Barragan M., Brownian distance correlation-directed search: A fast feature selection technique for alternate test, Integration, the VLSI Journal, Ed. Elsevier, Vol. , 2016
 
11 Barragan M., Stratigopoulos H., Mir S., Le Gall H., Bhargava N., Bal A., Practical Simulation Flow for Evaluating Analog and Mixed-Signal Test Techniques, IEEE Design & Test, Ed. IEEE, Vol. 33, No. 6, pp. 46-54, DOI: 10.1109/MDAT.2016.2590985, December 2016
 
12 Andraud M., Stratigopoulos H., Simeu E., One-Shot Non-Intrusive Calibration Against Process Variations for Analog/RF circuits, IEEE Transactions on Circuits and Systems, Ed. IEEE, Vol. 63, No. 11, DOI: 10.1109/TCSI.2016.2598184 , November 2016
 
13 Barragan M., Alhakim R., Stratigopoulos H., Dubois M., Mir S., Le Gall H., Bhargava N., Bal A., A Fully-Digital BIST Wrapper Based on Ternary Test Stimuli for the Dynamic Test of a 40 nm CMOS 18-bit Stereo Audio Sigma-Delta ADC, IEEE Transactions on Circuits and Systems, Ed. IEEE, Vol. 63, No. 11, pp. 1876-1888, DOI: 10.1109/TCSI.2016.2602387, November 2016
 
14 Renaud G., Barragan M., Laraba A., Stratigopoulos H., Mir S., Le Gall H., Naudet H., A 65nm CMOS Ramp Generator Design and its Application Towards a BIST Implementation of the Reduced-Code Static Linearity Test Technique for Pipeline ADCs, Journal of Electronic Testing: Theory and Applications, Ed. Springer , Vol. 32, No. 4, pp. 407-421, DOI: 10.1007/s10836-016-5599-8, April 2016
 
15 Laraba A., Stratigopoulos H., Mir S., Naudet H., Exploiting pipeline ADC properties for a reduced-code linearity test technique, IEEE Transactions on Circuits and Systems, Ed. IEEE, Vol. 62, No. 10, pp. 2391-2400, DOI: 10.1109/TCSI.2015.2469014, October 2015
 
16 Dimakos A., Stratigopoulos H., Siligaris A., Mir S., De Foucauld E., Parametric Built-In Test for 65nm RF LNA Using Non-Intrusive Variation-Aware Sensors, Journal of Electronic Testing: Theory and Applications, Ed. Springer , Vol. 31, No. 4, pp. 381-394, DOI: 10.1007/s10836-015-5534-4, August 2015
 
17 Barragan M., Leger G., A Procedure for Alternate Test Feature Design and Selection , IEEE Design and Test of Computers, Ed. IEEE, Vol. 32, No. 1, pp. 18-25, DOI: 10.1109/MDAT.2014.2361722, February 2015
 
18 Beznia K., Bounceur A., Euler R., Mir S., A tool for analog/RF BIST evaluation using statistical models of circuit parameters, Transactions on Design Automation of Electronic Systems (TODAES), Ed. ACM, NY, USA, Vol. 20 , No. 2, DOI: 10.1145/2699837, February 2015
 
19 Barragan M., Leger G., Vazquez D., Rueda A., On-chip sinusoidal signal generation with harmonic cancelation for analog and mixed-signal BIST applications, Analog Integrated Circuits and Signal Processing, Ed. Kluwer Academic Publishers, Vol. 82, No. 1, pp. 67-79, DOI: 10.1007/s10470-014-0456-0, January 2015
 
20 Stratigopoulos H., Sunter S., Fast Monte Carlo-Based Estimation of Analog Parametric Test Metrics , IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Ed. IEEE, Vol. 33, No. 12, pp. 1977 - 1990 , DOI: 10.1109/TCAD.2014.2360458, December 2014
 
21 Alhakim R., Raoof K., Simeu E., Design of tracking loop with dirty templates for UWB communication systems, Signal Image and Video Processing Journal, Ed. Springer , Vol. 8, No. 3, pp. 461-477, DOI: 10.1007/s11760-012-0352-y, March 2014
 
22 Alhakim R., Raoof K., Simeu E., Detection of UWB signal using dirty template approach, Signal Image and Video Processing Journal, Ed. Springer , Vol. 8, No. 3, pp. 549-563, DOI: 10.1007/s11760-013-0554-y, March 2014
 
23 Laraba A., Stratigopoulos H., Mir S., Naudet H., Bret G., Reduced code linearity testing of pipeline ADCs, IEEE Design and Test of Computers, Ed. IEEE, Vol. 30, No. 6, pp. 80-88, DOI: 10.1109/MDAT.2013.2267957, December 2013
 
24 Alhakim R., Simeu E., Raoof K., Novel control for delay-locked loop in IR-UWB communication systems, Control Engineering Practice, Ed. IFAC - International Federation of Automatic Control, Vol. 21, No. 10, pp. 1437-1454, DOI: 10.1016/j.conengprac.2013.06.014, October 2013
 
25 Alhakim R., Raoof K., Simeu E., Serrestou Y., Cramer-Rao lower bounds and maximum likelihood timing synchronization for dirty template UWB communications , Signal Image and Video Processing Journal, Ed. Springer , Vol. 7, July, No. 4, pp. 741-757, DOI: 10.1007/s11760-011-0265-1, July 2013
 
26 Huang K., Stratigopoulos H., Mir S., Hora C., Xing Y., Kruseman B., Diagnosis of Local Spot Defects in Analog Circuits , IEEE Transactions on Instrumentation and Measurement, Ed. IEEE, Vol. 61, No. 10, pp. 2701 - 2712 , DOI: 10.1109/TIM.2012.2196390, October 2012
 
27 Stratigopoulos H., Mir S., Adaptive Alternate Analog Test, IEEE Design and Test of Computers, Ed. IEEE, Vol. 29, No. 4, pp. 71-79, DOI: 10.1109/MDT.2012.2205480, July-August 2012
 
28 Kamsu-Foguem B., Simeu E., Optimizing Construction of Scheduled Data Flow Graph for Online testability, The Mediterranean Journal of Computers and Networks , Vol. 8, No. 4, pp. 125-133, January 2012
 
29 Stratigopoulos H., Test Metrics Model for Analog Test Development, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Ed. IEEE, Vol. 31, No. 7, pp. 1116 - 1128 , DOI: 10.1109/TCAD.2012.2185931, January 2012
 
30 Abdallah L., Stratigopoulos H., Mir S., Kelma C., RF Front-End Test Using Built-in Sensors , IEEE Design and Test of Computers, Ed. IEEE, Vol. 28, No. 6, pp. 76-84, DOI: 10.1109/MDT.2011.131 , November-December 2011
 
31 Bounceur A., Mir S., Stratigopoulos H., Estimation of Analog Parametric Test Metrics Using Copulas, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Ed. IEEE, Vol. 30, No. 9, pp. 1400-1410, DOI: 10.1109/TCAD.2011.2149522 , Septembre 2011
 
32 Bousquet L., Cenni F., Simeu E., Inclusion of Power Consumption Information in High-Level Modeling of Linear Analog Blocks , Journal of Low Power Electronics (JOLPE), Ed. American Scientific Publishers, Vol. 7, No. 4, pp. 541-551, DOI: http://dx.doi.org/10.1166/jolpe.2011.1156, January 2011
 
33 Cenni F., Cazalbou J., Mir S., Rufer L., Design of a SAW-based chemical sensor with its microelectronics front-end interface , Microelectronics journal, Ed. Elsevier, Vol. 41, No. 11, pp. 723-732, DOI: 10.1016/j.mejo.2010.06.008 , November 2010
 
34 Stratigopoulos H., Drineas P., Slamani M., Makris Y., RF Specification Test Compaction Using Learning Machines, Transactions on Very Large Scale Integration (VLSI) Systems, Ed. IEEE, Vol. 18, No. 6, pp. 998 - 1002 , DOI: 10.1109/TVLSI.2009.2017196 , January 2010
 
35 Tounsi F., Mezghani B., Rufer L., Masmoudi M., Mir S., Electromagnetic Investigation of a CMOS MEMS Inductive Microphone, Sensors & Transducers Journal (ISSN 1726- 5479), Ed. IFSA, International Frequency Sensor Association, Vol. 108, No. 9, pp. 40-53, Septembre 2009
 
36 Dhayni A., Mir S., Rufer L., Bounceur A., Simeu E., Pseudorandom BIST for test and characterization of linear and nonlinear MEMS, Microelectronics journal, Ed. Elsevier, Vol. 40, No. 7, pp. 1054-1061, DOI: 10.1016/j.mejo.2008.05.012, July 2009
 
37 Stratigopoulos H., Mir S., Bounceur A., Evaluation of analog/RF test measurements at the design stage, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Ed. IEEE, Vol. 28, No. 4, pp. 582-590, DOI: 10.1109/TCAD.2009.2016136, April 2009
 
38 Lalinsky T., Ryger I., Rufer L., Vanko G., Hascik S., Mozolova Z., Tomaska M., Vincze A., Surface Acoustic Wave Excitation on SF6 plasma treated AlGaN/GaN heterostructure, Vacuum Journal , Ed. Elsevier, Vol. 84, No. 1, pp. 231-234 , DOI: 10.1016/j.vacuum.2009.05.010, January 2009
 
39 Stratigopoulos H., Makris Y., Error moderation in low-cost machine-learning-based analog/RF testing, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Ed. IEEE, Vol. 27(2), pp. 339-351, DOI: 10.1109/TCAD.2007.907232 , 2008
 
40 Lalinsky T., Rufer L., Vanko G., Mir S., Hascik S., Mozolova Z., Vincze A., Uherek F., AlGaN/GaN heterostructure based surface acoustic wave structures for chemical sensors, Applied Surface Science, Ed. Elsevier, Vol. 255, No. 3, pp. 712-714, DOI: 10.1016/j.apsusc.2008.07.016 , November 2008
 
41 Simeu E., Nguyen H.N., Cauvet P., Mir S., Rufer L., Khereddine R., Using signal envelope detection for online and offline RF MEMS switch testing, Journal of VLSI Design, Ed. Hindawi Publishing Corporation, Vol. 2008, No. Article ID 294014, pp. 1-10, DOI: 10.1155/2008/294014, January 2008
 
42 Bounceur A., Mir S., Simeu E., Rolindez L., Estimation of test metrics for the optimisation of analogue circuit testing, Journal of Electronic Testing: Theory and Applications, Ed. Springer , Vol. 23, No. 6, pp. 471-484, DOI: 10.1007/s10836-007-5006-6, June 2007
 
43 Ma W., Zhu R., Rufer L., Zohar Y., Wong M., An integrated floating-electrode electric micro-generator, Journal of Microelectromechanical Systems, Ed. IEEE, Vol. 16, No. 1, pp. 29-37, DOI: 10.1109/JMEMS.2006.885856, January 2007
 
44 Rolindez L., Mir S., Bounceur A., Carbonero J.L., A BIST scheme for SNDR testing of sigma delta ADCs using sine-wave fitting, Journal of Electronic Testing: Theory and Applications, Ed. Springer , Vol. 22, No. 4-6, pp. 325-335, DOI: 10.1007/s10836-006-9500-z, December 2006
 
45 Rufer L., Domingues C., Mir S., Petrini V., Jeannot J.C., Delobelle P., A CMOS compatible ultrasonic transducer fabricated with deep reactive ion etching, Journal of Microelectromechanical Systems, Ed. IEEE, Vol. 15, No. 6, pp. 1766-1776, DOI: 10.1109/JMEMS.2006.886390, December 2006
 
46 Mir S., Rufer L., Dhayni A., Built-in-self-test techniques for MEMS, Microelectronics journal, Ed. Elsevier, Vol. 37, No. 12, pp. 1591-1597 , DOI: 10.1016/j.mejo.2006.04.016, December 2006
 
47 Alam M.O., Wu B.Y., Chan Y.C., Rufer L., Reliability of BGA Solder Joints on the Au/Ni/Cu Bond Pad – Effect of Thicknesses of Au and Ni layer, IEEE Transactions on Device and Materials Reliability, Vol. 6, No. 3, pp. 421-428, DOI: 10.1109/TDMR.2006.881451, January 2006
 
48 Prenat G., Mir S., Rolindez L., Vazquez D., A low-cost digital frequency testing approach for mixed-signal devices using Sigma Delta modulation, Microelectronics journal, Ed. Elsevier, Vol. 36, No. 12, pp. 1080-1090, DOI: 10.1016/j.mejo.2005.04.062, December 2005
 
49 Rufer L., Mir S., Simeu E., Domingues C., On-chip pseudorandom MEMS testing, Journal of Electronic Testing: Theory and Applications, Ed. Springer , Vol. 21, No. 3, pp. 233-241, DOI: 10.1007/s10836-005-6353-9, June 2005
 
50 Roman C., Mir S., Charlot B., Building an analogue fault simulation tool and its application to MEMS, Microelectronics journal, Ed. Elsevier, Vol. 34, No. 10, pp. 897-906, DOI: 10.1016/S0026-2692(03)00162-9, October 2003
 
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4 Patents

1 Mir S., Circuit and method for on-chip testing of a pixel array, No. 14/60121, 21 October 2014
 
2 Dubois M., Mir S., Stratigopoulos H., Sigma-Delta ADC with test circuit, No. 10/02741 , 1 June 2010
 
3 Rehder G.P., Ligne de transmission haute fréquence accordable, No. Demande de brevet No 10/52067, 23 March 2010
 
4 Simeu E., Bortolin-Argenton E., Procédé de détection de défaillance d'un capteur analogique et dispositif de détection pour mettre en œuvre le dit procédé, No. 08/03.420, 19 June 2008
 
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38 Invited conference talks

 1 Cilici F., Leger G., Barragan M., Mir S., Lauga-Larroze E., Bourdel S., Efficient generation of data sets for one-shot statistical calibration of RF/mm-wave circuits, Hot topic session, International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD 2019), Lausanne, SWITZERLAND, 15 to 18 July 2019
 
 2 Barragan M., Leger G., Feature selection and feature design for machine learning indirect test: a tutorial review, Hot topic session, International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD 2019), Lausanne, SWITZERLAND, 15 to 18 July 2019
 
 3 Mir S., Barragan M., Mammasse M., BIST Solutions for Industrial Mixed-signal Circuits, Invited talk (Special Session), 25th International On-Line Testing Symposium (IOLTS 2019), Rhodes, GREECE, 1 to 3 July 2019
 
 4 Leger G., Barragan M., Mixed-signal test automation: are we there yet?, Invited talk (Special Session), IEEE International Symposium on Circuits & Systems (ISCAS'2018), Florence, ITALY, DOI: 10.1109/ISCAS.2018.8351734, 27 to 30 May 2018
 
 5 Mir S., Analog, mixed-signal and MEMS design-for-test and its use for intelligent sensors, Invited talk (Special Session), 36th IEEE VLSI Test Symposium (VTS'2018), San Francisco, UNITED STATES, DOI: 10.1109/VTS.2018.8368648, 22 to 25 April 2018
 
 6 Leger G., Barragan M., Why is systematic AMS-RF test not there yet ?, Invited Tutorial, CEDA 2017, Barcelona, SPAIN, 21 November 2017
 
 7 Pastorelli C., Mellot P., Tubert C., Mir S., Design of a Piece-Wise-Linear Ramp ADC for CMOS imagers, Invited talk (Special Session), 22nd IEEE International Mixed-Signal Test Workshop (IMSTW 2017), Thessaloniki, GREECE, 3 to 5 July 2017
 
 8 Mir S., Fei R., Moreau J., Droniou T., BIST of power and control lines in CMOS imagers, Invited talk (Special Session), 21st IEEE International Mixed-Signal Testing Workshop (IMSTW'16), Sant Feliu de Guixols, SPAIN, 4 to 6 July 2016
 
 9 Barragan M., Leger G., Efficient strategies for feature selection and discovery in machine-learning test applications, Invited talk (Special Session), Conference on Design of Circuits and Integrated Systems (DCIS'15), Estoril, PORTUGAL, 25 to 27 November 2015
 
10 Dimakos A., Andraud M., Abdallah L., Stratigopoulos H., Simeu E., Mir S., Test and calibration of RF circuits using built-in non-intrusive sensors, Invited talk (Special Session), IEEE International Computer Society Annual Symposium on VLSI (ISVLSI'15), pp. 627, Montpellier, FRANCE, DOI: 10.1109/ISVLSI.2015.42, 8 to 10 July 2015
 
11 Mir S., Analog, mixed-signal and MEMS design-for-test and its use for WSN, Invited Tutorial, Winter School on Wireless Sensor Networks (WSWSN), Algiers, ALGERIA, 14 to 15 December 2014
 
12 Altet J., Aldrete-Vidrio E., Reverter F., Gomez D., Gonzalez J.L., Onabajo M., Silva-Martinez J., Martineau B., Perpinà X., Abdallah L., Stratigopoulos H., Aragonès X., Jordà X., Vellvehi M., Dilhaire S., Mir S., Mateo D., Review of temperature sensors as monitors for RF mmW built-in testing and self-calibration schemes, Invited Talk, 57th IEEE Midwest Symposium on Circuits and Systems (MWSCAS'14), pp. 1081-1084, Texas, UNITED STATES, DOI: 10.1109/MWSCAS.2014.6908606, 3 to 6 August 2014
 
13 Mir S., Analog/RF test techniques, Invited Tutorial, 14th European Test Symposium, Test Spring School, Paderborn, GERMANY, 26 to 30 May 2014
 
14 Dubois M., Stratigopoulos H., Barragan M., Alhakim R., Mir S., Analog/RF test problem solving with statistically sampled data, Invited talk (Elevator talk), IEEE VLSI Test Symposium (VTS'14), Napa, California, UNITED STATES, 14 to 16 May 2014
 
15 Stratigopoulos H., RF Built-In Test with Non-Intrusive Sensors, IEEE VLSI Test Symposium (VTS'14), Napa, California, UNITED STATES, 13 to 17 April 2014
 
16 Mir S., Statistical learning for test and control of analog/RF circuits, Keynote talk, 4th European Workshop on CMOS Variability (VARI'13), Karlsruhe, GERMANY, 9 to 11 Septembre 2013
 
17 Abdallah L., Stratigopoulos H., Mir S., Implicit Test of High-Speed Analog Circuits Using Non-Intrusive Sensors, Invited talk (Special Session), IEEE European Conference on Circuit Theory and Design (ECCTD’11), Linköping, SWEDEN, 29 to 31 August 2011
 
18 Stratigopoulos H., Statistical Learning for Analog Circuit Testing, Conference on International Design & Technology of Integrated Systems in Nanoscale Era (DTIS’11), Athens, GREECE, 6 to 8 April 2011
 
19 Stratigopoulos H., Mir S., Adaptive Alternate Analog Test, Invited talk (Special Session), IEEE Latin-American Test Workshop (LATW’11), Porto de Galinhas, BRAZIL, 27 to 30 March 2011
 
20 Mir S., Stratigopoulos H., Dubois M., Bounceur A., Evaluation of parametric test metrics for mixed-signal/RF DFT solutions using statistical techniques, Invited Talk, Catrene European Nanoelectronics Design Technology Conference, Grenoble, FRANCE, 23 to 24 June 2010
 
21 Mir S., Stratigopoulos H., Bounceur A., Density estimation for analog/RF test problem solving, Invited Talk, 28th IEEE VLSI Test Symposium, pp. 41, Santa Cruz, UNITED STATES, DOI: 10.1109/VTS.2010.5469620 , 19 to 22 April 2010
 
22 Simeu E., Embedded Test and Control of Analogue/RF Circuits Using Intelligent Resources, Embedded tutorial, 11th Latin America Test Workshop (LATW'10), Punta del Este, URUGUAY, 28 to 31 March 2010
 
23 Stratigopoulos H., Checkers for on-line monitoring of analog circuits, Emerging Technologies Workshop (ETW'09), Vancouver, CANADA, 23 to 25 Septembre 2009
 
24 Courtois B., Charlot B., Di Pendina G., Rufer L., Infrastructures for education, research and industry: CMOS and MEMS for BioMed, 12th World Multi-Conference on Systemics, Cybernetics and Informatics (WMSCI’08), Orlando, FL, UNITED STATES, 29 June to 2 July 2008
 
25 Mir S., Evaluation of mixed-signal/RF DFT solutions for SiP devices using statistical techniques, Invited Talk, Workshop on Reliability & DfX engineering for System-in-Package Technologies (SiPeX'08), Pallanza, ITALY, 29 May 2008
 
26 Mir S., Rufer L., Simeu E., Nguyen H.N., Khereddine R., DFT for MEMS, Invited Talk, RF-MEMS Workshop on Industry Applications: RF power MEMS: reliability and applications, Barcelona, SPAIN, 28 June 2007
 
27 Mir S., Test intégré des circuits mixtes, Invited Talk, Journées de la section électronique du Club EEA, SiP et SoC : nouvelles perspectives, nouveaux défis, Montpellier, FRANCE, 27 March 2007
 
28 Simeu E., Mir S., Rufer L., Concurrent testing embedded systems: adapting automatic control techniques to microelectronics testing , Invited Talk, 16th IFAC World Congress, pp. Paper Tu-A15-TO, Prague, CZECH REPUBLIC, 4 to 8 July 2005
 
29 Simeu E., Mir S., Rufer L., Online testing embedded systems: adapting automatic control techniques to microelectronics testing, Invited Talk, 16th IFAC World Congress, pp. 1180-1180, Prague, CZECH REPUBLIC, DOI: 10.3182/20050703-6-CZ-1902.01181, 1 July 2005
 
30 Mir S., Rufer L., Dhayni A., Built-In Self-Test techniques for MEMS, Invited Talk, 1st International Workshop on Advances in Sensors and Interfaces (IWASI'05), pp. 34-38, Bari, ITALY, 19 to 20 April 2005
 
31 Mir S., Rufer L., Charlot B., Courtois B., On-chip testing of embedded silicon transducers, Plenary talk, The 16th International Conference on Microelectronics (ICM'04), pp. 1-7, Iowa, UNITED STATES, DOI: 10.1109/ICM.2004.1434190, 6 to 8 December 2004
 
32 Mir S., Charlot B., Rufer L., Courtois B., On-chip testing of embedded silicon transducers, Invited Talk, IEEE International SOC Conference (SOCC'04), pp. 13-18, Santa Clara, CA, UNITED STATES, DOI: 10.1109/SOCC.2004.1362334, 12 to 15 Septembre 2004
 
33 Mir S., Prenat G., Rolindez L., Simeu E., Rufer L., On-chip analogue testing based on ΣΔ modulation, Invited Talk, Workshop on the testing of high resolution mixed signal interfaces, Ajaccio, Corse, FRANCE, 1 May 2004
 
34 Mir S., Rufer L., Courtois B., On-chip testing of embedded transducers, Invited Talk, 17th International Conference on VLSI Design, pp. 463-472, Mumbai, INDIA, DOI: 10.1109/ICVD.2004.1260965, 5 to 9 January 2004
 
35 Mir S., Integrated circuit testing: from microelectronics to microsystems, Plenary talk, 5th IFAC Symposium on Fault Detection, Supervision and Safety of Technical Processes (SAFEPROCESS'03), Washington, D.C, UNITED STATES, 9 to 11 June 2003
 
36 Mir S., Rolindez L., Domingues C., Rufer L., An implementation of memory-based on-chip analogue test signal generation, Invited Talk, Asia and South Pacific Design Automation Conference (ASP-DAC'03) , pp. 663-668, Kitakyushu, JAPAN, 21 to 24 January 2003
 
37 Mir S., From microelectronics to microsystem integrated circuit testing, Plenary talk, 8th International Conference on Quality, Reliability, Maintainability, Sinaia, ROMANIA, 18 to 20 Septembre 2002
 
38 Charlot B., Mir S., MEMS testing, Invited Talk, International Summer School on Advanced Microelectronics (MIGAS), Autrans, FRANCE, 23 to 29 June 2002
 
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172 International conferences

  1 Silveira Feitoza R., Barragan M., Mir S., Reduced-Code Techniques for On-Chip Static Linearity Test of SAR ADCs, 27th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Cuzco, PERU, 6 to 9 October 2019
 
  2 Malloug H., Barragan M., Mir S., A 52 dB-SFDR 166 MHz sinusoidal signal generator for mixed-signal BIST applications in 28 nm FDSOI technology, European Test Symposium (ETS 2019), Baden Baden, GERMANY, 27 to 31 May 2019
 
  3 Cilici F., Barragan M., Mir S., Lauga-Larroze E., Bourdel S., Leger G., Yield Recovery of mm-Wave Power Amplifiers using Variable Decoupling Cells and One-Shot Statistical Calibration, IEEE International Symposium on Circuits and Systems (ISCAS 2019), pp. 1-5, Sapporo, JAPAN, 26 to 29 May 2019
 
  4 Barragan M., Leger G., Cilici F., Lauga-Larroze E., Bourdel S., Mir S., On the use of causal feature selection in the context of machine-learning indirect test, Design, Automation & Test in Europe Conference & Exhibition (DATE 2019), pp. 276-279, Florence, ITALY, 25 to 29 March 2019
 
  5 Silveira Feitoza R., Barragan M., Mir S., Dzahini D., Reduced-code static linearity test of SAR ADCs using a built-in incremental Sigma-Delta converter, 24th IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS'2018), pp. 29-34, Platja d'Aro, SPAIN, DOI: 978-1-5386-5992-2/18, 2 to 4 July 2018
 
  6 Takam Tchendjou G., Simeu E., Self-Healing Imager Based on Detection and Conciliation of Defective Pixels, IEEE International Symposium on On-Line Testing And Robust System Design (IOLTS'2018), pp. 251-254, Platja d’Aro, Costa Brava, SPAIN, DOI: 10.1109/IOLTS.2018.8474149, 2 to 4 July 2018
 
  7 Cilici F., Barragan M., Mir S., Lauga-Larroze E., Bourdel S., Assisted test generation strategy for non-intrusive machine learning indirect test of millimeter-wave circuits, 23rd IEEE European Test Symposium (ETS'2018), pp. 1-6, Bremen, GERMANY, DOI: 978-1-5386-3728-9/18, 28 May to 1 June 2018
 
  8 Margalef-Rovira M., Barragan M., Sharma E., Ferrari P., Pistono E., Bourdel S., An Oscillation-Based Test technique for on-chip testing of mm-wave phase shifters, IEEE 36th VLSI Test Symposium (VTS'2018), pp. 1-6, San Francisco, UNITED STATES, DOI: 10.1109/VTS.2018.8368622, 22 to 25 April 2018
 
  9 Takam Tchendjou G., Simeu E., Lebowsky F., FPGA Implementation of Machine Learning Based Image Quality Assessment, 27th International Conference on Microelectronics (ICM 2017), pp. 1-4, Beirut, LEBANON, DOI: 10.1109/ICM.2017.8268848, 10 to 13 December 2017
 
 10 Malloug H., Barragan M., Mir S., Le Gall H., Harmonic cancellation strategies for on-chip sinusoidal signal generation using digital resources, International Mixed-Signal Testing Workshop (IMSTW 2017), Thessaloniki, GREECE, DOI: 10.1109/IMS3TW.2017.7995201, 3 to 5 July 2017
 
 11 Malloug H., Barragan M., Mir S., Basteres L., Le Gall H., Design of a sinusoidal signal generator with calibrated harmonic cancellation for mixed-signal BIST in a 28 nm FDSOI technology, European Test Symposium (ETS 2017), Limassol, CYPRUS, DOI: 10.1109/ETS.2017.7968214, 22 to 26 May 2017
 
 12 Renaud G., Margalef-Rovira M., Barragan M., Mir S., Analysis of an efficient on-chip servo-loop technique for reduced-code static linearity test of pipeline ADCs, VLSI Test Symposium (VTS 2017), Las Vegas, UNITED STATES, DOI: 10.1109/VTS.2017.7928951, 9 to 12 April 2017
 
 13 Barragan M., Leger G., Gines A., Peralias E., Rueda A., On the limits of machine learning-based test: a calibrated mixed-signal system case study, Design Automation and Test in Europe (DATE 2017), Lausanne, SWITZERLAND, DOI: 10.23919/DATE.2017.7926962, 27 to 31 March 2017
 
 14 Takam Tchendjou G., Alhakim R., Simeu E., Fuzzy logic modeling for objective image quality assessment, Conference on Design and Architecture for Signal and Image Processing (DASIP 2016), pp. 98-105, Rennes, FRANCE, DOI: 10.1109/DASIP.2016.7853803, 12 to 14 October 2016
 
 15 Gines A., Peralias E., Leger G., Rueda A., Renaud G., Barragan M., Mir S., Design Trade-offs for On-chip Driving of High-speed High-performance ADCs in Static BIST Applications, IEEE 21st International Mixed-Signal Testing Workshop (IMSTW'16), Sant Feliu de Guixols, SPAIN, 4 to 7 July 2016
 
 16 Takam Tchendjou G., Alhakim R., Simeu E., Lebowsky F., Evaluation of machine learning algorithms for image quality assessment, International Symposium on On-Line Test and Robust System Design (IOLTS 2016), pp. 193-194, Sant Feliu de Guixols, SPAIN, DOI: 10.1109/IOLTS.2016.7604697, 4 to 6 July 2016
 
 17 Malloug H., Barragan M., Mir S., Le Gall H., Mostly-digital design of sinusoidal signal generators for mixed-signal BIST applications using harmonic cancellation, IEEE 21st International Mixed-Signal Testing Workshop (IMSTW'16), Sant Feliu de Guixols, SPAIN, 4 to 7 July 2016
 
 18 Portolan M., Barragan M., Malloug H., Mir S., Interactive Mixed-Signal Testing Through 1687, First International Test Standards Application Workshop (TESTA'16), Amsterdam, NETHERLANDS, 26 to 27 May 2016
 
 19 Gines A., Peralias E., Leger G., Rueda A., Renaud G., Barragan M., Mir S., Linearity Test of High-speed High-performance ADCs using a Self-Testable On-chip Generator, 21st IEEE European Test Symposium (ETS'16), Amsterdam, NETHERLANDS, 23 to 27 May 2016
 
 20 Leger G., Barragan M., Questioning the reliability of Monte Carlo simulation for machine learning test validation, 21st IEEE European Test Symposium (ETS'16), Amsterdam, NETHERLANDS, 23 to 27 May 2016
 
 21 Dimakos A., Stratigopoulos H., Siligaris A., Mir S., De Foucauld E., Built-in test of millimeter-wave circuits based on non-intrusive sensors, Design, Automation and Test in Europe Conference (DATE'16), pp. 505-510, Munich, GERMANY, 14 to 18 March 2016
 
 22 Pastorelli C., Mellot P., Mir S., Tubert C., ADC techniques for optimized conversion time in CMOS image sensors, IS&T International Symposium on Electronic Imaging, Image Sensors and Imaging Systems, pp. 268.1-268.6, San Francisco, CA, UNITED STATES, 14 to 18 February 2016
 
 23 Alhakim R., Takam Tchendjou G., Simeu E., Lebowsky F., Image quality assessment using nonlinear learning methods, IEEE International Conference in Microelectronics (ICM 2015), pp. 5-8, Casablanca, MOROCCO, DOI: 10.1109/ICM.2015.7437973, 20 to 23 December 2015
 
 24 Stratigopoulos H., Barragan M., Mir S., Le Gall H., Bhargava N., Bal A., Evaluation of low-cost mixed-signal test techniques for circuits with long simulation times, IEEE International Test Conference (ITC'15), Anaheim, CA, UNITED STATES, 6 to 8 October 2015
 
 25 Leger G., Barragan M., A hybrid method for feature selection in the context of Alternate Test, International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD'15), pp. 1-4, Istanbul, TURKEY, 7 to 9 Septembre 2015
 
 26 Tchuani Tchakonte D., Simeu E., Tchuente M., Adaptive healing procedure for lifetime improvement in Wireless Sensor Networks, IEEE 21st International On-Line Testing Symposium (IOLTS'2015), pp. 59–64, Elia, Halkidiki, GREECE, DOI: 10.1109/IOLTS.2015.7229833, 6 to 8 July 2015
 
 27 Renaud G., Barragan M., Mir S., Design of an on-chip stepwise ramp generator for ADC static BIST applications, IEEE International Mixed-Signal Testing Workshop (IMS3TW'15), pp. 1-6, Paris, FRANCE, DOI: 10.1109/IMS3TW.2015.7177876, 24 to 26 June 2015
 
 28 Malloug H., Barragan M., Mir S., Evaluation of harmonic cancellation techniques for sinusoidal signal generation in mixed-signal BIST, IEEE International Mixed-Signal Testing Workshop (IMS3TW'15), Paris, FRANCE, DOI: 10.1109/IMS3TW.2015.7177877, 24 to 26 June 2015
 
 29 Pastorelli C., Mellot P., Mir S., Tubert C., Piece-wise-linear ramp ADC for CMOS imager sensor and calibration techniques, International Image Sensor Workshop (IISW'15), Vaals, NETHERLANDS, 8 to 11 June 2015
 
 30 Le Gall H., Alhakim R., Valka M., Mir S., Stratigopoulos H., Simeu E., High Frequency Jitter Estimator for SoCs, 20th IEEE European Test Symposium (ETS'15), Cluj-Napoca, ROMANIA, DOI: 10.1109/ETS.2015.7138760, 25 to 29 May 2015
 
 31 Fei R., Moreau J., Mir S., Marcellin A., Mandier G., Huiss E., Palmigiani G., Vitrou P., Droniou T., Horizontal-FPN fault coverage improvement in production test of CMOS imagers, 33rd IEEE International VLSI Test Symposium (VTS'15), Napa, California, UNITED STATES, DOI: 10.1109/VTS.2015.7116278, 27 to 29 April 2015
 
 32 Barragan M., Leger G., Azais F., Blanton R.D., Singh Adit D., Sunter S., Special session: Hot topics: Statistical test methods, VLSI Test Symposium (VTS), 2015 IEEE 33rd, pp. 1-2, Napa, CA, UNITED STATES, DOI: 10.1109/VTS.2015.7116265, 27 to 29 April 2015
 
 33 Liaperdos J., Stratigopoulos H., Abdallah L., Tsiatouhas Y., Arapoyanni A., Li X., Fast Deployment of Alternate Analog Test Using Bayesian Model Fusion, Design, Automation and Test in Europe Conference (DATE'15), Grenoble, FRANCE, DOI: doi: 10.7873/DATE.2015.0102, 9 to 13 March 2015
 
 34 Barragan M., Leger G., Feature selection for alternate test using wrappers: application to a LNA case study, Design Automation and Test in Europe Conference (DATE'15), Grenoble, FRANCE, DOI: doi: 10.7873/DATE.2015.0179, 9 to 13 March 2015
 
 35 Serhan A., Abdallah L., Stratigopoulos H., Mir S., Low-cost EVM built-in test of RF transceivers, 9th IEEE International Design and Test Symposium (IDT'14), pp. 51-54, Algiers, ALGERIA, DOI: 10.1109/IDT.2014.7038586, 16 to 18 December 2014
 
 36 Renaud G., Barragan M., Mir S., On-Chip Implementation of an Integrator-Based Servo-Loop for ADC Static Linearity Test , 23rd IEEE Asian Test Symposium (ATS'14), pp. 212-217, Hangzhou, CHINA, DOI: 10.1109/ATS.2014.47, 16 to 19 November 2014
 
 37 Dubois M., Stratigopoulos H., Mir S., Barragan M., Evaluation of digital ternary stimuli for dynamic test of ΣΔ ADCs , IFIP/IEEE 22nd International Conference on Very Large Scale Integration (VLSI-SoC'14), pp. 1-6, Playa del Carmen, Mexico, MEXICO, DOI: 10.1109/VLSI-SoC.2014.7004153, 6 to 8 October 2014
 
 38 Dimakos A., Stratigopoulos H., Siligaris A., Mir S., De Foucauld E., Non-intrusive built-in test for 65nm RF LNA , IEEE International Mixed-signals, Sensors and Systems Test Workshop (IMS3TW'14), Porto Alegre, BRAZIL, DOI: 10.1109/IMS3TW.2014.6997397, 17 to 19 Septembre 2014
 
 39 Alhakim R., Simeu E., Efficient tracking design in UWB communication systems , IEEE International Conference on Ultra-Wideband (ICUWB'14), pp. 211-216, Paris, FRANCE, DOI: 10.1109/ICUWB.2014.6958980, 1 to 3 Septembre 2014
 
 40 Andraud M., Deluthault A., Dieng M., Azais F., Bernard S., Cauvet P., Comte M., Kervaon T., Kerzerho V., Mir S., Pugliesi-Conti P., Renovell M., Soulier F., Simeu E., Stratigopoulos H., Solutions for the self-adaptation of communicating systems in operation, IEEE International On-line Test Symposium (IOLTS'14), pp. 234-239, Platja d’Aro, SPAIN, DOI: 10.1109/IOLTS.2014.6873705, 7 to 9 July 2014
 
 41 Andraud M., Stratigopoulos H., Simeu E., One-shot calibration of RF circuits based on non-intrusive sensors, Design Automation Conference (DAC'14), pp. 1-6, San Francisco, CA, UNITED STATES, DOI: 10.1109/DAC.2014.6881337, 1 to 5 June 2014
 
 42 Stratigopoulos H., Sunter S., Efficient Monte Carlo-Based Analog Parametric Fault Modelling, IEEE VLSI Test Symposium (VTS'14), pp. 1-6, Napa, CA, UNITED STATES, DOI: 10.1109/VTS.2014.6818741, 13 to 17 April 2014
 
 43 Ekobo Akoa B., Simeu E., Lebowsky F., Using statistical analysis and artificial intelligence tools for automatic assessment of video sequences, Color Imaging XIX: Displaying, Processing, Hardcopy, and Applications, pp. 1-11, San Francisco, California, UNITED STATES, DOI: 10.1117/12.2044797, 2 to 6 February 2014
 
 44 Alhakim R., Simeu E., Fast-tracking delay-locked loop for UWB communication systems , International Conference on Microelectronics (ICM'13), pp. 1-4, Beirut, LEBANON, DOI: 10.1109/ICM.2013.6734971, 15 to 18 December 2013
 
 45 Ekobo Akoa B., Simeu E., Lebowsky F., Using Classification for Video Quality Evaluation, IEEE International Conference on Microelectronics (ICM'13), pp. 1-4, Beirut, LEBANON, DOI: 10.1109/ICM.2013.6734964, 15 to 18 December 2013
 
 46 Beznia K., Bounceur A., Mir S., Euler R., Output parameter reduction for an efficient evaluation of alternative test techniques, 28th International Conference on Design of Circuits and Integrated Systems (DCIS'13), pp. 258-263, San Sebastian, SPAIN, 27 to 29 November 2013
 
 47 Bentobache M., Bounceur A., Euler R., Kieffer Y., Mir S., New techniques for selecting test frequencies for linear analog circuits, 21st IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC'13), pp. 90-95, Istanbul, TURKEY, 7 to 9 October 2013
 
 48 Huang K., Stratigopoulos H., Mir S., Fault modeling and diagnosis for nanometric analog circuits, IEEE International Test Conference (ITC'13), Paper PTF3, Anaheim, CA, UNITED STATES, DOI: 10.1109/TEST.2013.6651886, 6 to 13 Septembre 2013
 
 49 Abdallah L., Stratigopoulos H., Mir S., Non-intrusive sensors for testing RF circuits, IEEE International Test Conference (ITC'13), Paper PTF2, Anaheim, CA, UNITED STATES, DOI: 10.1109/TEST.2013.6651885, 6 to 13 Septembre 2013
 
 50 Ekobo Akoa B., Simeu E., Lebowsky F., Video decoder monitoring using non-linear regression, IEEE 19th International On-Line Testing Symposium (IOLTS'13), pp. 175 - 178 , Chania, GREECE, DOI: 10.1109/IOLTS.2013.6604073, 8 to 10 July 2013
 
 51 Fei R., Moreau J., Mir S., BIST of interconnection lines in the pixel matrix of CMOS imagers, 5th IEEE International Workshop on Advances in Sensors and Interfaces (IWASI'13), pp. 174-177, Bari, ITALY, DOI: 10.1109/IWASI.2013.6576068, 13 to 14 June 2013
 
 52 Stratigopoulos H., Faubet P., Courant Y., Mohamed F., Multidimensional analog test metrics estimation using extreme value theory and statistical blockade , 50th ACM / EDAC / IEEE Design Automation Conference (DAC'13), Austin, TX, UNITED STATES, 29 May 2013
 
 53 Abdallah L., Stratigopoulos H., Mir S., Altet J., Defect-Oriented Non-Intrusive RF Test Using On-Chip Temperature Sensors, IEEE VLSI Test Symposium (VTS'13), Berkeley, CA, UNITED STATES, DOI: 10.1109/VTS.2013.6548889, 29 April 2013
 
 54 Laraba A., Stratigopoulos H., Mir S., Naudet H., Bret G., Reduced code linearity testing of pipeline adcs in the presence of noise , IEEE VLSI Test Symposium (VTS'13), Berkeley, CA, UNITED STATES, DOI: 10.1109/VTS.2013.6548913, 29 April 2013
 
 55 Bousquet L., Simeu E., System-level modeling of electromechanical devices with energy consumption, 7th International IEEE Systems Conference (Syscon'13), pp. 756-761, Orlando, Florida, UNITED STATES, DOI: 10.1109/SysCon.2013.6549968, 15 to 18 April 2013
 
 56 Huang K., Stratigopoulos H., Abdallah L., Mir S., Bounceur A., Multivariate Statistical Techniques for Analog Parametric Test Metrics Estimation, 8th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS'13), pp. 06-11, Abu Dhabi, UNITED ARABIAN EMIRATES, 26 to 28 March 2013
 
 57 Beznia K., Bounceur A., Mir S., Euler R., Statistical Modelling of Analog Circuits for Test Metrics Computation, 8th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS'13), pp. 25-29, Abu Dhabi, UNITED ARABIAN EMIRATES, 26 to 28 March 2013
 
 58 Ekobo Akoa B., Simeu E., Lebowsky F., Using Artificial Neural Network for Automatic Assessment of Video Sequences , 27th International Conference on Advanced Information Networking and Applications Workshops (WAINA'13), pp. 285-290, Barcelona, SPAIN, DOI: 10.1109/WAINA.2013.191, 25 to 28 March 2013
 
 59 Beznia K., Bounceur A., Abdallah L., Huang K., Mir S., Euler R., Accurate estimation of analog test metrics with extreme circuits, 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS'12), pp. 272 - 275, Sevilla, SPAIN, DOI: 10.1109/ICECS.2012.6463748, 9 to 12 December 2012
 
 60 Bounceur A., Euler R., Saoud B., Beznia K., Mir S., A tool for statistical modeling by means of Copulas of analog and mixed-signal circuits, 27th International Conference on Design of Circuits and Integrated Systems (DCIS'12), pp. 256-260, Avignon, FRANCE, 28 to 30 November 2012
 
 61 Abdallah L., Stratigopoulos H., Mir S., Kelma C., Experiences with non-intrusive sensors for RF built-in test, IEEE International Test Conference (ITC'12), Paper 17.1, Anaheim, CA, UNITED STATES, DOI: 10.1109/TEST.2012.6401587 , 5 to 8 November 2012
 
 62 Dragulinescu A., Lizarraga L., Mir S., Effects of doping concentrations on the photocurrent and dark current of a CMOS photodiode, Advanced Topics in Optoelectronics, Microelectronics, and Nanotechnologies VI, Constanta, ROMANIA, DOI: 10.1117/12.966394 , 1 November 2012
 
 63 Laraba A., Stratigopoulos H., Mir S., Naudet H., Forel C., Enhanced Reduced Code Linearity Test Technique for Multi-bit/Stage Pipeline ADCs, 17th IEEE European Test Symposium (ETS’12), Annecy, FRANCE, DOI: 10.1109/ETS.2012.6233009, 28 May 2012
 
 64 Dubois M., Stratigopoulos H., Mir S., Ternary Stimulus for Fully Digital Dynamic Testing of SC ΣΔ ADCs , IEEE International Mixed-Signals, Sensors, and Systems Test Workshop (IMS3TW'12), pp. 5 - 10 , Taipei, TAIWAN, DOI: 10.1109/IMS3TW.2012.12, 14 to 16 May 2012
 
 65 Bousquet L., Simeu E., High-level Modeling of Power Consumption in Active Linear Analog Circuits, 22nd Great Lakes Symposium on Very Large Scale Integration (GLSVLSI'12), pp. 87-90, Salt Lake City, Utah, UNITED STATES, DOI: 10.1145/2206781.2206804, 3 to 4 May 2012
 
 66 Akkouche N., Mir S., Simeu E., Slamani M., Analog/RF test ordering in the early stages of production testing , 30th IEEE VLSI Test Symposium (VTS'12), pp. 25-30 , Hawaii, UNITED STATES, DOI: 10.1109/VTS.2012.6231075, 23 to 25 April 2012
 
 67 Alhakim R., Raoof K., Simeu E., Design of Tracking Loop for UWB Systems, International Conference on Information Processing and Wireless Systems (IP-WIS'12), pp. 1-5, Sousse, TUNISIA, 16 to 18 March 2012
 
 68 De Jonghe D., Maricau E., Gielen G., McConaghy T., Tasic B., Stratigopoulos H., Advances in variation-aware modeling, verification, and testing of analog ICs , IEEE Design, Automation and Test in Europe Conference, pp. 1615 - 1620 , Dresden, GERMANY, 12 to 16 March 2012
 
 69 Lévêque A., Pêcheux F., Louërat M.-M., Aboushady A., Cenni F., Scotti S., Massouriz A., Clavierz L., Holistic Modeling of Embedded Systems with Multi-Discipline Feedback: Application to a Precollision Mitigation Braking System, Design, Automation and Test in Europe (DATE'12), pp. 739-744, Dresden, GERMANY, 12 to 16 March 2012
 
 70 Abdallah L., Stratigopoulos H., Mir S., Altet J., Testing RF Circuits With True Non-Intrusive Built-In Sensors, IEEE Design, Automation and Test in Europe (DATE'12), pp. 1090-1095, Dresden, GERMANY, 12 to 16 March 2012
 
 71 Kupp N., Stratigopoulos H., Drineas P., Makris Y., On Proving the Efficiency of Alternative RF Tests, IEEE/ACM International Conference on Computer-Aided Design (ICCAD'11), pp. 762 - 767 , San Jose, CA, UNITED STATES, DOI: 10.1109/ICCAD.2011.6105415 , 7 to 10 November 2011
 
 72 Cenni F., Scotti S., Simeu E., A SystemC AMS/TLM platform for CMOS video sensors , IEEE Conference on Design and Architectures for Signal and Image Processing (DASIP’11), pp. 1-6, Tampere, FINLAND, DOI: 10.1109/DASIP.2011.6136873 , 2 to 4 November 2011
 
 73 Spyronasios A., Abdallah L., Stratigopoulos H., Mir S., On Replacing an RF Test with an Alternative Measurement: Theory and a Case Study, IEEE Asian Test Symposium (ATS’11), pp. 365-370, New Delhi, INDIA, DOI: 10.1109/ATS.2011.44 , 2 to 23 November 2011
 
 74 Cenni F., Scotti S., Simeu E., SystemC-AMS behavioral modeling of a CMOS video sensor, 19th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC’11), pp. 380 - 385 , Hong Kong, CHINA, DOI: 10.1109/VLSISoC.2011.6081614 , 3 to 5 October 2011
 
 75 Alhakim R., Raoof K., Simeu E., Serrestou Y., Data-aided timing estimation in UWB communication systems using dirty templates, IEEE International Conference on Ultra Wideband (ICUWB’11), pp. 435 - 439 , Bologna, ITALY, DOI: 10.1109/ICUWB.2011.6058880 , 14 to 16 Septembre 2011
 
 76 Cenni F., Scotti S., Simeu E., Behavioral modeling of a CMOS video sensor platform using SystemC AMS / TLM, IEEE Forum for Design Languages (FDL’11), pp. 1-6, Oldenburg, GERMANY, 13 to 15 Septembre 2011
 
 77 Alhakim R., Simeu E., Raoof K., Internal model control for a self-tuning Delay-Locked Loop in UWB communication systems , 17th IEEE International On-Line Testing Symposium (IOLT’11), pp. 121 - 126 , Athens, GREECE, DOI: 10.1109/IOLTS.2011.5993822 , 13 to 15 July 2011
 
 78 Vittoz S., Rufer L., Rehder G.P., Srnanek R., Kovac J., Study of built-in stress distribution in AlGaN/GaN/AlN heterostructure based cantilevers for mechanical sensing in harsh environments , 4th IEEE International Workshop on Advances in Sensors and Interfaces (IWASI’11), pp. 17-20, Brindisi, ITALY, DOI: 10.1109/IWASI.2011.6004678 , 28 to 29 June 2011
 
 79 Beznia K., Bounceur A., Mir S., Euler R., Parametric test metrics estimation using non-Gaussian copulas, IEEE International Mixed-Signals, Sensors, and Systems Test Workshop (IMS3TW’11), pp. 48-52, Santa Barbara, Ca, UNITED STATES, DOI: 10.1109/IMS3TW.2011.19, 16 to 18 May 2011
 
 80 Kupp N., Stratigopoulos H., Drineas P., Makris Y., PPM-Accuracy Error Estimates for Low-Cost Analog Test: A Case Study, IEEE International Mixed-Signals, Sensors, and Systems Test Workshop (IMS3TW’11), Santa Barbara, California, UNITED STATES, 16 to 18 May 2011
 
 81 Esteves J., Rufer L., Rehder G.P., Capacitive Microphone fabricated with CMOS MEMS Surface-Micromachining Technology, Symposium on Design, Test, Integration and Packaging of MEMS/MOEMS (DTIP'11), pp. 309-314, Aix-en Provence, FRANCE, 11 to 13 May 2011
 
 82 Bousquet L., Cenni F., Simeu E., SystemC-AMS high-level modeling of linear analog blocks with power consumption information, IEEE 12th IEEE Latin American Test Workshop (LATW’11), pp. 1-6, Porto de Galinhas, BRAZIL, DOI: 10.1109/LATW.2011.5985924 , 27 to 30 March 2011
 
 83 Huang K., Stratigopoulos H., Mir S., Bayesian fault diagnosis of RF circuits using nonparametric density estimation, IEEE Asian Test Symposium (ATS’10), pp. 295-298, Shanghai, CHINA, DOI: 10.1109/ATS.2010.57 , 1 to 4 December 2010
 
 84 Stratigopoulos H., Mir S., Analog test metrics estimates with PPM accuracy, IEEE/ACM International Conference on Computer-Aided Design (ICCAD'10), pp. 241-247, San Jose, CA, UNITED STATES, DOI: 10.1109/ICCAD.2010.5654165 , 7 to 11 November 2010
 
 85 Zhou Z., Wong M., Rufer L., The Design, Fabrication and Characterization of a Piezoresistive Tactile Sensor for Fingerprint Sensing, 9th Annual IEEE Conference on Sensors, pp. 2589 - 2592 , Waikoloa, HI, UNITED STATES, DOI: 10.1109/ICSENS.2010.5690176 , 1 to 4 November 2010
 
 86 Maliuk D., Stratigopoulos H., Huang K., Makris Y., Analog neural network design for RF built-in self-test, IEEE International Test Conference (ITC'10), pp. 23.2, Austin, TX, UNITED STATES, DOI: 10.1109/TEST.2010.5699272 , 31 October 2010
 
 87 Edwards M.J., Vittoz S., Amen R., Rufer L., Johander P., Bowen C.R., Allsopp D.W.E., Modelling and optimisation of a sapphire/GaN-based diaphragm structure for pressure sensing in harsh environments, 8th International Conference on Advanced Semiconductor Devices Microsystem (ASDAM'10), pp. 127-130, Smolenice, SLOVAKIA, DOI: 10.1109/ASDAM.2010.5666320 , 25 to 27 October 2010
 
 88 Khereddine R., Abdallah L., Simeu E., Mir S., Cenni F., Adaptive Logical Control of RF LNA performances for efficient energy consumption, 18th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC'10), pp. 161-166, Madrid, SPAIN, 27 to 29 Septembre 2010
 
 89 Alhakim R., Raoof K., Simeu E., A Novel Fine Synchronization Method for Dirty Template UWB Timing Acquisition, 6th International Conference on Wireless Communications Networking and Mobile Computing (WiCOM'10), pp. 4 p., Chengdu, CHINA, 23 to 25 Septembre 2010
 
 90 Vittoz S., Rufer L., Rehder G.P., Heinle U., Benkart P., Analytical and numerical modeling of AlGaN/GaN/AlN heterostructure based cantilevers for mechanical sensing in harsh environments, European Conference on sensors, actuators and microsystems (Eurosensors'10), pp. 91-94, Linz, AUSTRIA, DOI: 10.1016/j.proeng.2010.09.055, 5 to 8 Septembre 2010
 
 91 Tongbong J., Abdallah L., Mir S., Stratigopoulos H., Evaluation of built-in sensors for RF LNA response measurement, 16th IEEE International Mixed-signals, Sensors and Systems Test Workshop (IMS3TW'10), La Grande Motte, FRANCE, DOI: 10.1109/IMS3TW.2010.5502996 , 7 to 9 June 2010
 
 92 Abdallah L., Stratigopoulos H., Kelma C., Mir S., Sensors for built-in alternate RF test, IEEE European Test Symposium (ETS’10), pp. 49-54, Prague, CZECH REPUBLIC, DOI: 10.1109/ETSYM.2010.5512783 , 24 to 28 May 2010
 
 93 Arthaud Y., Rufer L., Mir S., Study of a 3D MEMS-based tactile vibration sensor for the use in the middle ear surgery, International Symposium on Design, Test, Integration and Packaging of MEMS/MOEMS (DTIP’10), pp. 266-271, Sevilla, SPAIN, 5 to 7 May 2010
 
 94 Akkouche N., Mir S., Simeu E., Ordering of analog specification tests based on parametric defect level estimation, 28th IEEE VLSI Test Symposium (VTS'10), pp. 301 - 306 , Santa Cruz, UNITED STATES, DOI: 10.1109/VTS.2010.5469546 , 19 to 22 April 2010
 
 95 Huang K., Stratigopoulos H., Mir S., Fault diagnosis of analog circuits based on machine learning, Design, Automation and Test in Europe Conference (DATE’10) Germany, pp. 1761-1766, Dresden, GERMANY, 8 to 12 March 2010
 
 96 Rehder G.P., Mir S., Rufer L., Simeu E., Nguyen H.N., Low Frequency Test for RF MEMS Switches, IEEE International Symposium on Electronic Design, Test and Applications (DELTA’10), pp. 350-354, Ho Chi Minh City, VIET NAM, DOI: 10.1109/DELTA.2010.16 , 13 to 15 January 2010
 
 97 Tounsi F., Rufer L., Mezghani B., Masmoudi M., Mir S., Highly Flexible Membrane Systems for Micromachined Microphones – Modeling and Simulation, 3rd IEEE International Conference on Signals, Circuits and Systems, (SCS'09), DJerba, TUNISIA, 6 to 8 November 2009
 
 98 Cenni F., Simeu E., Mir S., Macro-modeling of analog blocks for SystemC-AMS simulation: A chemical sensor case-study, 17th IFIP International Conference on Very Large Scale Integration (VLSI-SoC’09), Florianapolis, BRAZIL, 12 October 2009
 
 99 Dubois M., Stratigopoulos H., Mir S., Hierarchical parametric test metrics estimation: A sigma-delta converter BIST case-study, 27th IEEE International Conference on Computer Design (ICCD’09), pp. 78-83, Lake Tahoe, California, UNITED STATES, DOI: 10.1109/ICCD.2009.5413173 , 4 to 7 October 2009
 
100 Cenni F., Mir S., Rufer L., Behavioral modeling and simulation of a chemical sensor with its microelectronics front-end interface, 3rd IEEE International Workshop on Advances in Sensors and Interfaces (IWASI’09), pp. 92-97, Trani, ITALY, DOI: 10.1109/IWASI.2009.5184776, 25 to 26 June 2009
 
101 Zhou Z., Rufer L., Wong M., Aero-Acoustic Microphone with Layer-Transferred Single-Crystal Silicon Piezoresistors, 15th International Conference on Solid-State Sensors, Actuators and Microsystems (Transducers’09), pp. 1916-1919, Denver Colorado, UNITED STATES, 21 to 25 June 2009
 
102 Stratigopoulos H., Mir S., Acar E., Ozev S., Defect filter for alternate RF test, IEEE European Test Symposium (ETS’09), pp. 101-106 , Sevilla, SPAIN, DOI: 10.1109/ETS.2009.32, 25 to 29 May 2009
 
103 Lizarraga L., Mir S., Sicard G., Experimental validation of a BIST technique for CMOS active pixel sensors, 27th IEEE VLSI Test Symposium (VTS’09), pp. 189-194, Santa Cruz, UNITED STATES, DOI: 10.1109/VTS.2009.30, 3 to 7 May 2009
 
104 Asquini A., Bounceur A., Mir S., Badets F., Carbonero J.L., Bouzaida L., DFT technique for RF PLLs using built-in monitors , Design and Technology of Integrated Systems (DTIS’09), pp. 210-215, Cairo, EGYPT, 6 to 7 April 2009
 
105 Tounsi F., Mezghani B., Rufer L., Mir S., Masmoudi M., Electromagnetic modelling of an integrated micromachined inductive microphone, Design and Technology of Integrated Systems (DTIS’09), pp. 38-44, Cairo, EGYPT, DOI: 10.1109/DTIS.2009.4938020, 6 to 7 April 2009
 
106 Stratigopoulos H., Mir S., Makris Y., Enrichment of limited training sets in machine-learning-based analog/RF Test, Design, Automation and Test in Europe Conference (DATE’09), pp. 1668 - 1673 , Nice, FRANCE, 2 to 24 April 2009
 
107 Khereddine R., Simeu E., Mir S., Parameter identification of RF transceiver blocks using regressive models, IFAC Workshop on Programmable Devices and Embedded Systems (PDeS’09), pp. 67-72, Roznov pod Radhostem, CZECH REPUBLIC, 1 to 12 February 2009
 
108 Lechuga Y., Bounceur A., Mozuelos R., Martinez M., Bracho S., Mir S., Test limit evaluation for an ADC Design-for-Test approach by using a CAT platform, 23rd International Conference on Design of Circuits and Integrated Systems (DCIS’08), Grenoble, FRANCE, 12 to 14 November 2008
 
109 Lalinsky T., Rufer L., Vanko G., Ryger I., Hascik S., Tomaska M., Mozolova Z., Vincze A., Surface acoustic wave excitation on SF6 plasma treated AlGaN/GaN heterostructure, The 7th International Conference Advanced Semiconductor Devices Microsystems (ASDAM’08), pp. 311-314 , Smolenice Castle, SLOVAKIA, DOI: 10.1109/ASDAM.2008.4743346, 12 to 16 October 2008
 
110 Lalinsky T., Ryger I., Rufer L., Vanko G., Hascik S., Mozolova Z., Tomaska M., Vincze A., Surface Acoustic Wave Excitation on SF6 plasma treated AlGaN/GaN heterostructure, 12th Joint Vacuum Conference, 10th European Vacuum Conference, 7th Annual Meeting of the German Vacuum Society, Balatonalmádi, Lake Balaton , HUNGARY, 22 to 26 Septembre 2008
 
111 Kupka R., Simeu E., Stratigopoulos H., Rufer L., Mir S., Tumova O., Signature analysis for MEMS pseudorandom testing using neural networks, 12th IMEKO TC1 & TC7 Joint Symposium on Man Science & Measurement, pp. 321-325, Annecy, FRANCE, 3 to 5 Septembre 2008
 
112 Courtois B., Charlot B., Di Pendina G., Rufer L., Electronics manufacturing infrastructures for education and commercialization, 30th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBS’08), pp. 1571-1574 , Vancouver, CANADA, 20 to 25 August 2008
 
113 Bounceur A., Mir S., Estimation of test metrics for AMS/RF BIST using Copulas, 14th IEEE International Mixed-Signals, Sensors and Systems Test Workhop (IMS3TW’08), Vancouver, CANADA, DOI: 10.1109/IMS3TW.2008.4581615 , 18 to 20 June 2008
 
114 Courtois B., Charlot B., Di Pendina G., Rufer L., Infrastructures for mixed signals in biology and medicine, 14th IEEE Int. Mixed-Signals, Sensors, and Systems Test Workshop (IMS3TW’08), pp. 1-4, Vancouver, CANADA, DOI: 10.1109/IMS3TW.2008.4581622 , 18 to 20 June 2008
 
115 Asquini A., Badets F., Mir S., Carbonero J.L., Bouzaida L., PFD output monitoring for RF PLL BIST, 14th IEEE International Mixed-Signals, Sensors and Systems Test Workhop (IMS3TW’08), Vancouver, CANADA, DOI: 10.1109/IMS3TW.2008.4581625 , 18 to 20 June 2008
 
116 Dardig J., Stratigopoulos H., Stern E., Reed M., Makris Y., A Statistical Approach to Characterizing and Testing Functionalized Nanowires, IEEE VLSI Test Symposium (VTS’08), pp. 267-274 , San Diego, Ca, UNITED STATES, DOI: 10.1109/VTS.2008.19, 27 April to 1 May 2008
 
117 Khereddine R., Simeu E., Mir S., RF transceiver parameter identification using regressive models, International Conference on Design and Technology of Integrated Systems (DTIS’08), pp. 166, Tozeur, TUNISIA, DOI: 10.1109/DTIS.2008.4540208 , 25 to 27 March 2008
 
118 Stratigopoulos H., Tongbong J., Mir S., A general method to evaluate RF BIST techniques based on non-parametric density estimation , IEEE Design Automation and Test in Europe (DATE'08), pp. 68-73, Munich, GERMANY, DOI: 10.1109/DATE.2008.4484662, 10 to 14 March 2008
 
119 Jean-Mistral C., Basrour S., Chaillout J.J., Dielectric polymer: scavenging energy from human motion, Electroactive Polymer Actuators and Devices (EAPAD'08), Orlando, UNITED STATES, 9 to 13 March 2008
 
120 Rolindez L., Mir S., Carbonero J.L., Goguet D., Chouba N., A Stereo Audio ΣΔ ADC Architecture with Embedded SNDR Self-Test, IEEE International Test Conference (ITC’07), Paper 32.1, Santa Clara, UNITED STATES, 23 to 25 October 2007
 
121 Lizarraga L., Mir S., Sicard G., Evaluation of a BIST technique for CMOS imagers, IEEE Asian Test Symposium (ATS’07) , pp. 378-383 , Beijing, CHINA, 8 to 11 October 2007
 
122 Akkouche N., Bounceur A., Mir S., Simeu E., Minimization of functional tests by statistical modelling of analogue circuits, International Conference on Design and Technology of Integrated Systems (DTIS’07), pp. 35-40, Rabat, MOROCCO, 2 to 5 Septembre 2007
 
123 Lalinsky T., Rufer L., Vanko G., Mir S., AlGaN/GaN heterostructure based surface acoustic wave structures for chemical sensors, 11th International Conference on the Formation of Semiconductor Interfaces (ICFSI’07), Manaus, BRAZIL, 19 to 24 August 2007
 
124 Simeu E., Mir S., Khereddine R., Nguyen H.N., Envelope detection based transition time supervision for online testing of RF MEMS switches, IEEE International On-Line Test Symposium (IOLT’07), pp. 237-243, Crete, GREECE, DOI: 10.1109/IOLTS.2007.30, 8 to 11 July 2007
 
125 Akkouche N., Bounceur A., Mir S., Simeu E., Functional test compaction by statistical modelling of analogue circuits, 13th IEEE International Mixed-Signals Testing Workhop (IMSTW’07), pp. 20-24, Porto, PORTUGAL, 18 to 20 June 2007
 
126 Simeu E., Nguyen H.N., Cauvet P., Mir S., Rufer L., Khereddine R., Using signal envelope detection for RF MEMS switch testing, 13th IEEE International Mixed-Signals Testing Workhop (IMSTW’07), pp. 68-73, Porto, PORTUGAL, 18 to 20 June 2007
 
127 Asquini A., Carbonero J.L., Mir S., Test measurements evaluation for VCO and charge pump blocks in RF PLLs, SPIE International Symposium on Microtechnologies for the New Millenium, VLSI Circuits and Systems Conference, pp. 1A1-1A8, Gran Canaria, SPAIN, DOI: 10.1117/12.721819 , 10 May 2007
 
128 Stratigopoulos H., Drineas P., Slamani M., Makris Y., Non-RF to RF test correlation using learning machines: a case-study, 25th IEEE VLSI Test Symposium, (VTS’07), pp. 9-14, Berkeley, UNITED STATES, DOI: 10.1109/VTS.2007.41, 6 to 10 May 2007
 
129 Tongbong J., Mir S., Carbonero J.L., Evaluation of test measures for LNA production testing using a multinormal statistical model, IEEE Design, Automation & Test in Europe Conference & Exhibition (DATE '07), pp. 731-736, Nice, FRANCE, DOI: 10.1109/DATE.2007.364682, 16 to 20 April 2007
 
130 Lizarraga L., Mir S., Sicard G., Dragulinescu A., Defect and fault modelling of CMOS active pixel sensors, IEEE Latin American Test Workshop (LATW’07), Cuzco, PERU, 11 to 14 March 2007
 
131 Alam M.O., Dan Y., Wu B.Y., Chan Y.C., Rufer L., Solid State growth kinetics of complex intermetallics in the Pb-free Ball Grid Array (BGA) solder joint for MEMS Packaging, 8th Electronics Packaging Technology Conference (EPTC'06) , pp. 211-213, Singapore, SINGAPORE, DOI: 10.1109/EPTC.2006.342717, 6 to 8 December 2006
 
132 Dragulinescu A., Lizarraga L., Mir S., Sicard G., Defect and fault modelling of a CMOS n-diffusion photodiode, 3rd International Conference on Advanced Topics in Optoelectronics, Microelectronics and Nanotechnologies (ATOM-N’06), pp. 43-44, Bucharest, ROMANIA, 24 to 26 November 2006
 
133 Rolindez L., Mir S., Carbonero J.L., Design of a 96-dB audio Sigma-Delta ADC including a BIST technique for SNDR testing, 21st Conference on Design of Circuits and Integrated Systems (DCIS’06), Barcelona, SPAIN, 22 to 24 November 2006
 
134 Dhayni A., Mir S., Rufer L., Bounceur A., Characterization and testing of MEMS nonlinearities, International Design and Test Symposium (IDT’06), Dubai, UNITED ARABIAN EMIRATES, 19 to 20 November 2006
 
135 Bounceur A., Mir S., Simeu E., Rolindez L., CAT platform for analogue and mixed-signal test evaluation and optimization , 14th IFIP International Conference on Very Larage Scale Integration (VLSI-SoC’06), pp. 320-325, Nice, FRANCE, 16 to 18 October 2006
 
136 Rufer L., Lalinsky T., Grobelny D., Mir S., Vanko G., Oszi Z., Mozolova Z., Gregus J., GaAs and GaN based SAW chemical sensors: acoustic part design and technology , 6th International Conference on Advanced Semiconductor Devices and Microsystems (ASDAM’06), pp. 165-168, Smolenice, SLOVAKIA, 16 to 18 October 2006
 
137 Lizarraga L., Mir S., Sicard G., Bounceur A., Study of a BIST technique for CMOS active pixel sensors, 14th IFIP International Conference on Very Large Scale Integration (VLSI-SoC’06), pp. 326-331, Nice, FRANCE, 16 to 18 October 2006
 
138 Grobelny D., Rufer L., Simulation of SAW-based chemical sensor, WOFEX 2006, pp. 213-218, Ostrava, CZECH REPUBLIC, 21 to 22 Septembre 2006
 
139 Bounceur A., Mir S., Simeu E., Rolindez L., Estimation of test metrics for multiple analogue parametric deviations, International Conference on Design and Technology of Integrated Systems (DTIS'06), pp. 234-239, Tunis, TUNISIA, 5 to 7 Septembre 2006
 
140 Bounceur A., Mir S., Rolindez L., Simeu E., On the accurate estimation of test metrics for multiple analogue parametric deviations, 12th International Mixed-Signals Testing Workshop (IMSTW’06), pp. 19-26, Edinburgh, UNITED KINGDOM, 21 to 23 June 2006
 
141 Dhayni A., Mir S., Rufer L., Pseudorandom functional BIST for MEMS, 12th International Mixed-Signals Testing Workshop (IMSTW’06), pp. 143-149, Edinburgh, UNITED KINGDOM, 21 to 23 June 2006
 
142 Rolindez L., Mir S., Bounceur A., Carbonero J.L., A SNDR BIST for SigmaDelta Analogue-to-Digital Converters, 24th IEEE VLSI Test Symposium (VTS'06), pp. 314-319, Berkeley, CA, UNITED STATES, DOI: 10.1109/VTS.2006.12, 30 April 2006
 
143 Dhayni A., Mir S., Rufer L., Bounceur A., Pseudorandom Functional BIST for Linear and Nonlinear MEMS, IEEE Design, Automation and Test in Europe Conference (DATE '06), pp. 664-669, Munich, GERMANY, 6 to 10 March 2006
 
144 Alam M.O., Chan Y.C., Rufer L., Effect of Au and Ni layer thicknesses on the reliability of BGA solder joints, International Symposium on Electronics Materials and Packaging (EMAP'05), pp. 88-94, Tokyo, JAPAN, DOI: 10.1109/EMAP.2005.1598241, 11 to 14 December 2005
 
145 Rufer L., Torres A., Mir S., Alam M.O., Lalinsky T., Chan Y.C., SAW chemical sensors based on AlGaN/GaN piezoelectric material system: acoustic design and packaging considerations, International Symposium on Electronics Materials and Packaging (EMAP'05), pp. 204-208, Tokyo, JAPAN, DOI: 10.1109/EMAP.2005.1598262, 11 to 14 December 2005
 
146 Dhayni A., Mir S., Rufer L., Bounceur A., On-chip pseudorandom testing for linear and nonlinear MEMS, International Conference on Very Larage Scale Integration (VLSI-SoC’05), pp. 435-440, Perth, AUSTRALIA, 17 to 19 October 2005
 
147 Matakias S., Tsiatouhas Y., Arapoyanni A., Haniotakis Th., Prenat G., Mir S., A built-in IDDQ testing circuit, 31st European Solid-State Circuits Conference (ESSCIRC'05), pp. 471-474, Grenoble, FRANCE, DOI: 10.1109/ESSCIR.2005.1541662, 12 to 16 Septembre 2005
 
148 Rolindez L., Mir S., Bounceur A., Carbonero J.L., A digital bist for a 16-bit audio sigma-delta analogue-to-digital converter, 11th Annual International Mixed-Signals Testing Workshop (IMSTW'05), pp. 45-52, Cannes, FRANCE, 27 to 29 June 2005
 
149 Dhayni A., Mir S., Rufer L., Bounceur A., Nonlinearity effects on MEMS on-chip pseudorandum testing, 11th Annual International Mixed-Signals Testing Workshop (IMSTW'05), pp. 224-233, Cannes, FRANCE, 27 to 29 June 2005
 
150 Simeu E., Mir S., Parameter identification based diagnosis in linear and non-linear mixed-signal systems , International Mixed-Signals Testing Workshop (IMSTW'05), pp. 140-147, Cannes, FRANCE, 27 to 29 June 2005
 
151 Ma W., Rufer L., Zohar Y., Wong M., Design and implementation of an integrated floating-gate electrostatic power micro-generator, 13th International Conference on Solid State Sensors, Actuators and Microsystems (TRANSDUCERS'05) , pp. 299-302, Seoul, KOREA, DOI: 10.1109/SENSOR.2005.1496416, 5 to 9 June 2005
 
152 Ma W., Wong M., Rufer L., Dynamic simulation of an implemented electrostatic power micro-generator, Symposium on Design, Test, Integration and Packaging of MEMS/MOEMS (DTIP'05), pp. 380-385, Montreux, SWITZERLAND, 1 to 3 June 2005
 
153 Dhayni A., Mir S., Rufer L., Evaluation of impulse response-based BIST techniques for MEMS in the presence of weak nonlinearities, European Test Symposium (ETS 2005), pp. 82-87, Tallinn, ESTONIA, DOI: 10.1109/ETS.2005.21, 22 to 25 May 2005
 
154 Rolindez L., Mir S., Prenat G., Digital test of a ΣΔ modulator in a mixed-signal BIST architecture, SPIE Microtechnologies for the New Millennium, VLSI circuits and systems II, pp. 502-512, Sevilla, SPAIN, DOI: 10.1117/12.607615, 9 to 11 May 2005
 
155 Kheriji R., Danelon V., Carbonero J.L., Mir S., Optimising Test Sets for a Low Noise Amplifier with a Defect-Oriented Approach, IEEE Design, Automation and Test in Europe Conference (DATE'05), pp. 170-171, Munich, GERMANY, DOI: 10.1109/DATE.2005.233, 7 to 11 March 2005
 
156 Kheriji R., Danelon V., Carbonero J.L., Mir S., Optimising test sets for RF components with a defect-oriented approach, 16th International Conference on Microelectronics (ICM'04), pp. 400-403, Tunis, TUNISIA, DOI: 10.1109/ICM.2004.1434597, 6 to 8 December 2004
 
157 Bounceur A., Mir S., Simeu E., Optimisation of digitally coded test vectors for mixed-signal components, 19th Conference on Design of Circuits and Integrated Systems (DCIS'04), Bordeaux, FRANCE, 24 to 26 November 2004
 
158 Prenat G., Mir S., Vasquez D., Rolindez L., A low-cost digital frequency testing approach for mixed-signal devices using sigma-delta modulation, 10th International Mixed-Signal Testing Workshop (IMSTW'04), Portland, UNITED STATES, 23 to 25 June 2004
 
159 Dhayni A., Mir S., Rufer L., MEMS Built-In-Self-Test Using MLS, IEEE European Test Symposium (ETS'04), pp. 66-71, Corse, FRANCE, DOI: 10.1109/ETSYM.2004.1347607, 23 to 26 May 2004
 
160 Rolindez L., Mir S., Prenat G., Bounceur A., A 0.18 mu m CMOS implementation of on-chip analogue test signal generation from digital test patterns, Design, Automation and Test in Europe Conference (DATE'04), pp. 704-705, Dresden, GERMANY, DOI: 10.1109/DATE.2004.1268939, 24 to 28 January 2004
 
161 Naal M. A., Simeu E., Mir S., Comparative study of online testing methods for AMS application to decimation filters, International Conference on Information and Communication Technologies: From Theory to Applications (ICTTA'04), pp. 393-394, Damascus, SYRIAN ARAB REPUBLIC, DOI: 10.1109/ICTTA.2004.1307797, 1 January 2004
 
162 Domingues C., Mir S., Rufer L., Design of a MEMS-based ultrasonic pulse-echo system, 18th Conference on Design of Circuits and Integrated Systems (DCIS'03), pp. 623-628, Ciudad Real, SPAIN, 18 to 21 November 2003
 
163 Rufer L., Mir S., Domingues C., Simeu E., MLS-based technique for MEMS characterization , 3rd International Workshop on Microfabricated Ultrasonic Transducers (MUT'03), pp. 157-164, Lausanne, SWITZERLAND, 26 to 27 June 2003
 
164 Rufer L., Mir S., Simeu E., Domingues C., On-chip pseudorandom MEMS testing, 9th International Mixed-Signal Testing Workshop (IMSTW'03), pp. 93-98, Sevilla, SPAIN, 25 to 27 June 2003
 
165 Rufer L., Mir S., Simeu E., Domingues C., On-chip testing of MEMS using pseudo-random test sequences, Design, Test, Integration and Packaging of MEMS/MOEMS (DTIP'03) , pp. 50-55, Mandelieu (Cannes), FRANCE, DOI: 10.1109/DTIP.2003.1287007, 5 to 7 May 2003
 
166 Rufer L., Mir S., Simeu E., On-chip testing of linear time invariant systems using maximum length sequences, IFAC Workshop on Programmable Devices and Systems (PDS'03), pp. 437-440, Ostrava, CZECH REPUBLIC, 11 to 13 February 2003
 
167 Naal M. A., Simeu E., Mir S., On-Line Testable Decimation Filter Design for AMS Systems, 9th IEEE International On-Line Testing Symposium (IOLT'03), pp. 83-88, Kos Island, GREECE, DOI: 10.1109/OLT.2003.1214371, 1 January 2003
 
168 Naal M. A., RAKOTOARISOA M.N., Simeu E., Aktouf C., Using concurrent and semi-concurrent on-line testing during HLS: an adaptable approach, Eighth IEEE International On Line Testing Workshop (IOLTW'02), pp. 184, Ile de Bendor, GREECE, DOI: 10.1109/OLT.2002.1030208, 8 to 10 July 2002
 
169 Mir S., Rufer L., Domingues C., Behavioral modelling and simulation of a MUT-based pulso-echo system, 2nd International Workshop on Microfabricated Ultrasonic Transducers, pp. 18-24, Besançon, FRANCE, 27 to 28 June 2002
 
170 Mir S., Diedrich C., Roman C., Domingues C., On-chip test signal generation for acoustic and ultrasound microelectronic interfaces, 8th IEEE International Mixed-Signal Testing Workshop (IMSTW'02), pp. 137-144, Montreux, SWITZERLAND, 13 to 15 June 2002
 
171 Roman C., Mir S., Charlot B., Building and analogue fault simulation tool and its application to MEMS, 8th IEEE International Mixed-Signal Testing Workshop (IMST3W'02), pp. 65-74, Montreux, SWITZERLAND, 1 June 2002
 
172 Rufer L., Domingues C., Mir S., Behavioural modelling and simulation of a MEMS-based ultrasonic pulse-echo system, Symposium on Design, Test, Integration and Packaging of MEMS/MOEMS (DTIP'02), pp. 171-182, Cannes, FRANCE, 1 January 2002
 
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15 Book chapters

 1 Stratigopoulos H., Kaminska B., Analog and Mixed-Signal Test, Electronic Design Automation for Integrated Circuits , Grant Martin, Luciano Lavagno, and Igor Markov (Eds.) , Ed. CRC Press, pp. , 2015
 
 2 Gines A., Fiorelli R., Villegas A., Doldan R., Barragan M., Vazquez D., Rueda A., Peralias E., Design of an energy efficient ZigBee transceiver, Mixed-Signal Circuits, M. Soma, T. Noulis (Eds.) , Ed. CRC Press, pp. , 2015
 
 3 Bentobache M., Bounceur A., Euler R., Mir S., Kieffer Y., Minimizing test frequencies for linear analog circuits: new models and efficient solution methods, in VLSI-SoC: At the Crossroads of Emerging Trends, A. Orailoglu et al. (Eds.) , Ed. Springer , pp. 188-207, Vol. 461, DOI: 10.1007/978-3-319-23799-2 9, 2015
 
 4 Dubois M., Stratigopoulos H., Mir S., Barragan M., Statistical evaluation of digital techniques for Sigma-Delta ADC BIST, VLSI-SoC: Internet of Things Foundations, Luc Claesen, Maria-Teresa Sanz-Pascual, Ricardo Reis, Arturo Sarmiento-Reyes (Eds.) , Ed. Springer , pp. 129-148, DOI: 10.1007/978-3-319-25279-7 8, 2015
 
 5 Khereddine R., Abdallah L., Simeu E., Mir S., Cenni F., Adaptive logical control of RF LNA performances for efficient energy consumption, in VLSI-SoC: Forward-Looking Trends in IC and Systems Design , J. Ayala, D. Atienza, R. Reis (Eds.) , Ed. Springer , pp. 43-68, Volume 373, DOI: DOI: 10.1007/978-3-642-28566-0_3, 2012
 
 6 Alhakim R., Raoof K., Simeu E., Timing Synchronisation for IR-UWB Communication Systems, Ultra Wideband - Current Status and Future Trends, M. A. Matin (Eds.) , Ed. InTech Europe, Rijeka, Croatia, pp. 15-40, 2012
 
 7 Stratigopoulos H., Makris Y., Checkers for Online Self-Testing of Analog Circuits, Advanced Circuits for Emerging Technologies, Kris Iniewski (Eds.) , Ed. Wiley, Chichester, UK, pp. Chapter 21, DOI: http://onlinelibrary.wiley.com/doi/10.1002/9781118181508.ch21/summary, 2012
 
 8 Bounceur A., Mir S., Rolindez L., Simeu E., CAT platform for analogue and mixed-signal test evaluation and optimization, in VLSI-SoC: Research trends in VLSI and Systems on Chip, G. De Micheli, S. Mir, R. Reis (Eds.) , Ed. Springer , pp. 281-300, Vol. 249, 2007
 
 9 Dhayni A., Mir S., Rufer L., Bounceur A., On-Chip pseudorandom testing for linear and non-linear MEMS, VLSI-SOC: From Systems to Silicon, Reis, Ricardo; Osseiran, Adam; Pfleiderer, Hans-Joerg (Eds.) , Ed. Springer , pp. 245-266, Vol. 240, DOI: DOI 10.1007/978-0-387-73661-7 , 2007
 
10 Charlot B., Martinez S., Mir S., La CAO des microsystèmes, Conception de microsystèmes sur silicium, Ed. Hermès, pp. 129-176, 2002
 
11 Mir S., Parrain F., Les interfaces microélectroniques, Conception de microsystèmes sur silicium , Mir S. (Eds.) , Ed. Hermès, pp. 177-215, 2002
 
12 Mir S., Charlot B., Parrain F., Les microsystèmes thermiques, Dispositifs et physique des microsystèmes sur silicium , Mir S. (Eds.) , Ed. Hermès, pp. 65-104, 2002
 
13 Mir S., Charlot B., Perspectives des microsystèmes sur silicium, Dispositifs et physique des microsystèmes sur silicium, Mir S. (Eds.) , Ed. Hermès, pp. 199-214, 2002
 
14 Mir S., Martinez S., Introduction aux microsystèmes sur silicium, Conception de microsystèmes sur silicium , Mir S. (Eds.) , Ed. Hermès, pp. 19-38, 2002
 
15 Mir S., Charlot B., From Microelectronics to Integrated Microsystems Testing, Microsystems Technology - Fabrication, test and reliability, J. Boussey (Eds.) , Ed. Lavoisier, pp. 241-263, 2002
 
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13 Books & Edited Publications

 1 Huang K., Barragan M. (Eds.) Journal of Electronic Testing: Special Issue on Analog, Mixed-Signal, and RF Testing, Vol. 34, pp. 213-370, Ed. Springer , 2018
 
 2 Barragan M., Eisenstadt W. (Eds.) Guest Editorial: Analog, Mixed-Signal and RF Testing, Special issue of Journal of Electronic Testing, Vol. 33, pp. 281-282, Ed. Springer , 2017
 
 3 Alhakim R., Raoof K., Simeu E. (Eds.) Optimizing the performance of synchronization process: in ultra-wideband communication systems, pp. 1-284, Ed. LAMBERT Academic Publishing (LAP), 2013
 
 4 Mir S., Tsui C.-Y., Reis R., Choi C.-H. (Eds.) VLSI-SoC: Advanced Research for Systems on Chip, IFIP Advances in Information and Communication Technology , Vol. 379, pp. 187 p., Ed. Springer , 2012
 
 5 Mir S., Tsui C.-Y., Choi C.-H., Reis R. (Eds.) Proceedings of 19th IFIP International Conference on Very Large Scale Integration (VLSI-SoC), Hong-Kong, pp. 187 p., Ed. IFIP, 2011
 
 6 De Micheli G., Mir S., Reis R. (Eds.) VLSI-SoC: Research Trends in VLSI and Systems on Chip, IFIP Advances in Information and Communication Technology, Vol. 249, pp. 398 p., Ed. Springer , 2007
 
 7 Simeu E., Mir S., De Micheli G., Reis R. (Eds.) Digest of Papers PhD Forum at 14th IFIP International Conference on Very Large Scale Integration (VLSI-SoC), pp. 83 pages, Ed. IFIP, 2006
 
 8 Mir S., Richardson A., Cheng K.T. (Eds.) Guest Editorial: Mixed-Signal Testing, Journal of Electronic Testing : Theory and Applications, Vol. 22, No. 4-6, pp. 311, Ed. Springer , 2006
 
 9 Mir S., De Micheli G., Reis R., Simeu E. (Eds.) Proceedings 14th IFIP International Conference on Very Large Scale Integration (VLSI-SoC’06), pp. 416 p., Ed. IFIP, 2006
 
10 Mir S. (Eds.) Proceedings 11th International Mixed-Signals Testing Workshop, Grenoble, France, pp. 358 pages, Ed. , 2005
 
11 Kaminska B., Sunter S., Mir S. (Eds.) Proceedings 10th International Mixed-Signals Testing Workshop, Portland, USA, pp. 246 pages, Ed. , 2004
 
12 Mir S. (Eds.) Conception de microsystèmes sur silicium (Traité EGEM, série Electronique et micro-électronique), pp. 224 p., Ed. Hermès, 2002
 
13 Mir S. (Eds.) Dispositifs et physique des microsystèmes sur silicium (Traité EGEM, série Electronique et micro-électronique), pp. 224 p., Ed. Hermès, 2002
 
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1 National journals

1 Mir S., Charlot B., From microelectronics to integrated microsystems testing , Nano et Micro-Technologies, Ed. Hermès, Vol. 2, No. 1-2, pp. 249-270, January 2002
 
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41 National conferences

 1 Silveira Feitoza R., Barragan M., Dzahini D., Mir S., Static linearity test of SAR ADCs using an embedded incremental Σ∆ converter, Journées Nationales du Réseau Doctoral en Micro-nanoélectronique (JNRDM 2019), Montpellier, FRANCE, 3 to 5 June 2019
 
 2 Margalef-Rovira M., Barragan M., Pistono E., Bourdel S., Ferrari P., Conception de déphaseurs RTPS faible consommation en bande millimétrique, 21èmes Journées Nationales Micro-ondes (JNM 2019), Caen, FRANCE, 14 to 17 May 2019
 
 3 Malloug H., Barragan M., Mir S., Conception d’un générateur de signal sinusoïdal basé sur les techniques d’annulation d’harmonique en 28nm FDSOI, Journées GDR SoC-SiP, Paris, FRANCE, 13 to 15 June 2018
 
 4 Cilici F., Barragan M., Lauga-Larroze E., Bourdel S., Mir S., Conception en vue du test d’un amplificateur de puissance à 60 GHz, Journées Nationales du Réseau Doctoral en Micro-nanoélectronique (JNRDM 2017), Strasbourg, FRANCE, 6 to 8 November 2017
 
 5 Alhakim R., Simeu E., Novel design of tracking process for UWB communication systems, IEEE AFRICON 2013, Pointe-Aux-Piments, MAURITIUS, DOI: 10.1109/AFRCON.2013.6757755, 9 to 12 Septembre 2013
 
 6 Bounceur A., Euler R., Beznia K., Mir S., Estimation des métriques de test analogique à base d’un échantillon multivarié de circuits extrêmes, Journées GDR SoC-SiP, Lyon, FRANCE, 11 to 12 June 2013
 
 7 Beznia K., Bounceur A., Euler R., Mir S., Réduction des paramètres de sortie des circuits analogiques par l’estimation des métriques de test, Journées GDR SoC-SiP, Lyon, FRANCE, 11 to 12 June 2013
 
 8 Beznia K., Bounceur A., Euler R., Mir S., Estimation des métriques de test analogique à base d’un échantillon multivarié de circuits extrêmes, 16ème Journées Nationales du Réseau Doctoral en Microélectronique (JNRDM'13), Grenoble, FRANCE, 10 June 2013
 
 9 Alhakim R., Simeu E., Raoof K., A novel design for delay-locked loop using internal model control approach, Journées scientifiques du projet SEmba 2013, Lyon, FRANCE, 4 to 5 April 2013
 
10 Fei R., Mir S., Moreau J., Défauts catastrophiques dans les capteurs optiques CMOS 1T75 PIN photodiode, Journées GDR ondes, Grenoble, FRANCE, 17 to 18 January 2013
 
11 Saoud B., Beznia K., Bounceur A., Mir S., Kerkar M., Outil de modélisation statistique des circuits analogiques et mixtes, Journées GDR SoC-SiP, Paris, FRANCE, 13 to 15 June 2012
 
12 Beznia K., Bounceur A., Mir S., Euler R., Test metrics computation using the statistical model of analog circuits, Journées GDR SoC-SiP, Paris, FRANCE, 13 to 15 June 2012
 
13 Abdallah L., Stratigopoulos H., Mir S., Conception et évaluation d’une technique de test pour un mélangeur RF, Journées GDR SoC-SiP, Lyon, FRANCE, 15 to 17 June 2011
 
14 Huang K., Stratigopoulos H., Mir S., Diagnostic de fautes de circuits analogiques basé sur l’estimation non paramétrique de densité , Journées GDR SoC-SiP, Lyon, FRANCE, 15 to 17 June 2011
 
15 Beznia K., Bounceur A., Mir S., Euler R., Evaluation d’un BIST d’un capteur de vision CMOS à base d’une copule non Gaussienne, Journées GDR SoC-SiP, Lyon, FRANCE, 15 to 17 June 2011
 
16 Bousquet L., Simeu E., Including power consumption information in SystemC-AMS modeling of linear analog blocks at LSF MoC Level, Journées GDR SoC-SiP, Lyon, FRANCE, 15 to 17 June 2011
 
17 Laraba A., Dubois M., Stratigopoulos H., Mir S., Evaluation de la technique de test basée sur la mesure d’un nombre réduit de codes pour les convertisseurs analogique-numérique de type pipeline, Journées Nationales du Réseau Doctoral en Microélectronique (JNRDM’11), Paris, FRANCE, 23 to 25 May 2011
 
18 Abdallah L., Stratigopoulos H., Mir S., Moniteurs embarqués pour le test à bas coût d’un front-end RF, Journées Nationales du Réseau Doctoral en Microélectronique (JNRDM’11), Paris, FRANCE, 23 to 25 May 2011
 
19 Abdallah L., Stratigopoulos H., Kelma C., Mir S., Capteurs embarqués pour le test alternatif des circuits RF, Journées GDR SoC-SiP, Paris, FRANCE, 9 to 11 June 2010
 
20 Huang K., Stratigopoulos H., Mir S., Diagnostic de fautes de circuits analogiques basé sur l’apprentissage automatique, Journées GDR SoC-SiP, Paris, FRANCE, 9 to 11 June 2010
 
21 Dubois M., Stratigopoulos H., Mir S., Evaluation des métriques de test pour des circuits analogiques/mixtes complexes, Journées GDR SoC-SiP, Paris, FRANCE, 9 to 11 June 2010
 
22 Vittoz S., Rufer L., Modélisation et caractérisation de capteurs mécaniques à base d’hétérostructures AlGaN/GaN pour environnements en conditions sévères, Journées Nationales du Réseau Doctoral en Microélectronique (JNRDM'10), Montpellier, FRANCE, 7 to 10 June 2010
 
23 Abdallah L., Tongbong J., Stratigopoulos H., Mir S., Alternate LNA testing using an envelope detector, Journées GDR SoC-SiP, Paris, FRANCE, 1 to 12 June 2009
 
24 Arthaud Y., Rufer L., Mir S., Capteur MEMS faible impédance mécanique haute sensibilité pour la chirurgie de l’oreille moyenne, Journées GDR MNS, Montpellier, FRANCE, 3 to 5 December 2008
 
25 Schmerber S., Arthaud Y., Rufer L., Mir S., Outils de monitoring per-opératoire de la biomécanique ossiculaire par micro-capteur en chirurgie otologique - Etude de faisabilité, 115eme Congres de la SFORL, Paris, FRANCE, 12 to 14 October 2008
 
26 Dubois M., Chouba N., Mir S., Calibrage automatique d’un convertisseur Sigma-Delta utilisant un BIST, 11ème Journées Nationales du Réseau Doctoral en Microélectronique (JNRDM’08), Bordeaux, FRANCE, 14 to 16 May 2008
 
27 Akkouche N., Mir S., Simeu E., Stratigopoulos H., Réduction de tests fonctionnels en utilisant des techniques d'estimation non paramétrique, 11ème Journées Nationales du Réseau Doctoral en Microélectronique (JNRDM’08), Bordeaux, FRANCE, 14 to 16 May 2008
 
28 Khereddine R., Simeu E., Mir S., Utilisation des modèles de regression pour l’identification des paramètres d’un transceiver RF, 11ème Journées Nationales du Réseau Doctoral en Microélectronique (JNRDM’08), Bordeaux, FRANCE, 14 to 16 May 2008
 
29 Rufer L., Arthaud Y., Mir S., Schmerber S., Dauvé S., Noury N., Outil de monitoring per-opératoire dans la chirurgie de l'oreille moyenne, Journées GDR MNS, Toulouse, FRANCE, 21 to 23 November 2007
 
30 Nguyen H.N., Rufer L., Simeu E., Mir S., RF MEMS series capacitive switch: test and diagnosis, Journées GDR SoC-SiP, Paris, FRANCE, 13 to 15 June 2007
 
31 Khereddine R., Simeu E., Mir S., Utilisation des techniques de regression pour le test et le diagnostic des composantes RF , Journées GDR SoC-SiP, Paris, FRANCE, 13 June 2007
 
32 Akkouche N., Bounceur A., Mir S., Réduction de tests fonctionnels par modélisation statistique des circuits analogiques, 10ème Journées Nationales du Réseau Doctoral en Microélectronique (JNRDM’07), Lille, FRANCE, 14 to 16 May 2007
 
33 Rufer L., Domingues C., Mir S., Petrini V., Jeannot J.C., Delobelle P., Transducteur ultrasonore microusiné compatible CMOS, Ecole MEMS & Acoustique, Villeneuve d’Ascq, FRANCE, 3 to 4 April 2007
 
34 Dhayni A., Mir S., Rufer L., Bounceur A., BIST pour les microsystèmes nonlinéaires, Journées Nationales du Réseau Doctoral de Microélectronique (JNRDM'06), Rennes, FRANCE, 10 to 12 May 2006
 
35 Lizarraga L., Mir S., Sicard G., Vers une technique d’auto test incorporé (BIST) pour des pixels actifs CMOS, Journées Nationales du Réseau Doctoral en Microélectronique (JNRDM’06), Rennes, FRANCE, 10 to 12 May 2006
 
36 Rufer L., Domingues C., Wong M., Dong J., Mir S., Electroacoustic and ultrasonic microtransducers, 8th French Acoustical Congress, pp. 487-490, Tours, FRANCE, 24 to 27 April 2006
 
37 Kheriji R., Danelon V., Carbonero J.L., Mir S., Test orienté défaut pour les circuits radio fréquences, 14ème Journées Nationales Microondes (JNM’05), Nantes, FRANCE, 11 to 14 May 2005
 
38 Dhayni A., Mir S., Rufer L., Bounceur A., Autotest Intégré des Microsystèmes Nonlinéaires, 8ème Journées Nationales du Réseau Doctoral de Microélectronique (JNRDM’05), pp. 256-258, Paris, FRANCE, 10 to 12 May 2005
 
39 Bounceur A., Dhayni A., Mir S., Rufer L., Génération de vecteurs de test pour les MEMS non linéaires pour le calcul des noyaux de Volterra, 8ème Journées Nationales du Réseau Doctoral de Microélectronique (JNRDM’05), pp. 340-342, Paris, FRANCE, 10 to 12 May 2005
 
40 Bounceur A., Mir S., Simeu E., Génération et optimisation de vecteurs de test pour des composants analogiques et mixtes, 7ème Journées Nationales du Réseau Doctoral de Microélectronique (JNRDM'04), pp. 198-200, Marseille, FRANCE, 4 to 6 May 2004
 
41 Domingues C., Rufer L., Mir S., Modélisation et simulation d'un microsystème ultrasonore pour une application pulse-echo , 5ème Journées Nationales du Réseau Doctoral de Microélectronique (JNRDM'02), pp. 87-88, Grenoble, FRANCE, 23 to 25 April 2002
 
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18 Other communications

 1 Bousquet L., Energy Consumption Information in High-level Models, PhD Forum at IEEE Design, Automation and Test in Europe Conference (DATE'13), Grenoble, FRANCE, 2013
 
 2 Stratigopoulos H., On-Line monitoring for analog and sensor-based systems, Special session organisation on 16th IEEE International On-Line Testing Symposium (IOLTS'10), Corfy, GREECE, 2010
 
 3 Stratigopoulos H., Mir S., Adaptive alternate analog test, IEEE International Test Workshop on Defect and Adaptive Test Analysis (DATA'12), Anaheim, CA, UNITED STATES, 2012
 
 4 Rufer L., Simeu E., Mir S., Built-in self-test of linear time invariant systems using maximum-length sequences, Poster at IEEE European Test Workshop (ETW'03), pp. 111-112, Maastricht, NETHERLANDS, 2003
 
 5 Tongbong J., Bounceur A., Mir S., Carbonero J.L., Evaluation of test measures for low-cost LNA production testing, PhD Forum at 14th IFIP International Conference on Very Large Scale Integraation (VLSI-SoC’06), pp. 48-52, Nice, FRANCE, 2006
 
 6 Barragan M., Leger G., Feature selection for Alternate Test using wrappers: application to an RF LNA case study, 1st Workshop on Statistical Test Methods (STEM'14), pp. 6, Paderborn, GERMANY, 2014
 
 7 Stratigopoulos H., Adaptive analog test: feasibility and opportunities Ahead, Panel organization on 28th IEEE VLSI Test Symposium (VTS'10), Santa Cruz, California, UNITED STATES, 2010
 
 8 Stratigopoulos H., Sunter S., Fast Monte Carlo-Based Estimation of Analog Parametric Test Metrics, 1st Workshop on Statistical Test Methods (Fringe event to ETS 2014), Paderborn, GREECE, 2014
 
 9 Stratigopoulos H., Mir S., Tongbong J., A versatile technique for evaluating test measurements at the design stage, 15th IEEE International Mixed-Signals, Sensors and Systems Test Workhop (IMST3W'09), Phoenix, UNITED STATES, 2009
 
10 Bounceur A., Mir S., Rolindez L., Simeu E., A CAT platform for analogue and mixed-signal test evaluation and optimization , Digest of Papers of the IEEE European Test Symposium (ETS’06), pp. 217-222, Southampton, UNITED KINGDOM, 2006
 
11 Paugnat F., Bousquet L., Fesquet L., Analog Design Abstraction Levels and SystemC AMS Models of Computation, SystemC-AMS Day 2011: Industry Adoption of the SystemC AMS Standard, Dresden, GERMANY, 2011
 
12 Paugnat F., Bousquet L., Morin-Allory K., Fesquet L., A Performance Comparison Between the SystemC-AMS Models of Computation, edaWorkshop 2011, pp. 13-18, Dresden, GERMANY, 2011
 
13 Akkouche N., Optimization of production test of analog and RF circuits using statistical modeling techniques, PhD Forum at IEEE Design, Automation and Test in Europe Conference (DATE'11), Grenoble, FRANCE, 2011
 
14 Cenni F., Scotti S., Simeu E., SystemC-AMS model of a CMOS video sensor. Open SystemC Initiative (OSCI) , SystemC AMS Day 2011: Industry Adoption of the SystemC AMS Standard, pp. 42-49, Dresden, GERMANY, 2011
 
15 Portolan M., Barragan M., Alhakim R., Mir S., Mixed-Signal BIST computation offloading using IEEE 1687, European Test Symposium (ETS 2017), Limassol, CYPRUS, 2017
 
16 Nguyen H.N., Simeu E., Rufer L., Mir S., Use of regressive method for RF MEMS test and diagnosis, PhD Forum at International Conference on Very Large Scale Integration (VLSI-Soc'06), pp. 56-61, Nice, FRANCE, 2006
 
17 Dubois M., Test metrics estimation of complex analog and mixed-signal circuits at the design stage, PhD Forum at IEEE Design, Automation and Test in Europe Conference (DATE'11), Grenoble, FRANCE, 2011
 
18 Bentobache M., Bounceur A., Euler R., Kieffer Y., Mir S., Efficient minimization of test frequencies for linear analog circuits, 13th IEEE European Test Symposium (ETS'13), Avignon, FRANCE, 2013
 
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25 Reports

 1 Mir S., Rolindez L., Carbonero J.L., Design of a 96-dB Audio SD ADC including a BIST Technique for SNDR Testing , ISRN: TIMA-RR--06/10-02--FR, 1 January 2006
 
 2 Bounceur A., Simeu E., Mir S., Rolindez L., Estimation of test metrics for the optimisation of analogue circuit testing , ISRN: TIMA-RR--06/10-03--FR, 1 January 2006
 
 3 Dhayni A., Rufer L., Mir S., Bounceur A., On-chip Pseudorandom Testing for Linear and Nonlinear MEMS, ISRN: TIMA-RR--06/10-04--FR, 1 January 2006
 
 4 Simeu E., Mir S., Diagnosis in Linear and Nonlinear Mixed-Signal Systems: a Parameter Identification Based Technique, ISRN: TIMA-RR--05/06-01--FR, 1 January 2005
 
 5 Ma W., Rufer L., Wong M., Dynamic simulation of an implemented electrostatic power micro-generator, ISRN: TIMA-RR--05/02-03--FR, 1 January 2005
 
 6 Rolindez L., Prenat G., Bounceur A., Mir S., A 0.18 ìm CMOS Implementation of On-chip Analogue Test Signal Generation from Digital Test Patterns, ISRN: TIMA-RR--04/05-05--FR, 1 January 2004
 
 7 Mir S., Bounceur A., Rolindez L., Prenat G., A 0.18 ìm CMOS Implementation On-chip Analogue Test Signal Generation from Digital Test Patterns, ISRN: TIMA-RR--04/02-02--FR, 1 January 2004
 
 8 Prenat G., Vasquez D., Mir S., Rolindez L., A low-cost digital frequency testing approach for mixed-signal devices using sigma delta modulation , ISRN: TIMA-RR--04/05-03--FR, 1 January 2004
 
 9 Naal M. A., Mir S., Simeu E., Comparative Study of On-Line Testing Methods for AMS Systems. Application to Decimation Filters, ISRN: TIMA-RR--04/05-02--FR, 1 January 2004
 
10 Mir S., Bounceur A., Simeu E., Génération et optimisation de vecteurs de test pour des composants analogiques et mixtes, ISRN: TIMA-RR--04/05-04--FR, 1 January 2004
 
11 Dhayni A., Mir S., Rufer L., MEMS Built-in-Self-Test Using MLS , ISRN: TIMA-RR--04/05-06--FR, 1 January 2004
 
12 Charlot B., Courtois B., Mir S., Rufer L., On-chip testing of embedded silicon transducers, ISRN: TIMA-RR--04/07-02--FR, 1 January 2004
 
13 Mir S., Rufer L., Courtois B., On-chip testing of embedded transducers, ISRN: TIMA-RR--04/05-07--FR, 1 January 2004
 
14 Simeu E., Mir S., Rufer L., Online Testing Embedded Systems: Adapting Automatic Control Techniques to Microelectronic Testing , ISRN: ISRN-RR--04/09-01-FR, 1 January 2004
 
15 Danelon V., Mir S., Kheriji R., Carbonero J.L., Optimising test sets for RF components with a defect-oriented approach, ISRN: TIMA-RR--05/02-01--FR, 1 January 2004
 
16 Simeu E., Rufer L., Mir S., Built-in-self -test of linear time invariant systems using maximum - lenght sequences, ISRN: TIMA-RR--03/07-02--FR, 1 January 2003
 
17 Mir S., Integrated circuits testing: from microelectronics to microsystems, ISRN: TIMA-RR--03/07-01--FR, 1 January 2003
 
18 Rufer L., Simeu E., Mir S., Domingues C., On-chip pseudorandom MEMS testing, ISRN: TIMA-RR--03/06-01--FR, 1 January 2003
 
19 Rufer L., Mir S., Simeu E., On-chip testing of linear time invariant systems using maximum-length sequences, ISRN: TIMA-RR--03/01-01--FR, 1 January 2003
 
20 Rufer L., Simeu E., Mir S., Domingues C., On-Chip testing of MEMS using pseudo-random test sequences, ISRN: TIMA-RR--03/03-02--FR, 1 January 2003
 
21 Naal M. A., Mir S., Simeu E., On-Line Testable Design: Application to Decimation Filter for AMS Systems, ISRN: TIMA-RR--03/08-01--FR, 1 January 2003
 
22 Mir S., Domingues C., Rolindez L., Rufer L., An implementation of memory-based on-chip analogue test signal generation, ISRN: TIMA-RR--02/11-02--FR, 1 January 2002
 
23 Domingues C., Rufer L., Mir S., Behavioural modelling and simulation of a MEMS-based ultrasonic pulse-echo system , ISRN: TIMA--RR-02/02/3--FR, 1 January 2002
 
24 Charlot B., Parrain F., Mir S., Courtois B., Generation of Electrically Induced Stimuli for MEMS self-test, ISRN: TIMA--RR-02/02/1--FR, 1 January 2002
 
25 Mir S., Roman C., Diedrich C., Domingues C., On-chip test signal generation for acoustic and ultrasound microelectronic interfaces, ISRN: TIMA-RR--02/09-01--FR, 1 January 2002
 
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33 PhD theses

 1 Barragan M., Built-In Self-Test solutions for high-performance and reliable analog, mixed-signal, and RF integrated circuits, HDR, 9 July 2019
 
 2 Takam Tchendjou G., Performance monitoring and errors reconciliation in image decoders, These de Doctorat, 12 December 2018
 
 3 Malloug H., Design of embedded sinusoidal signal generators for mixed signal Built-in Self-Test, These de Doctorat, 28 Septembre 2018
 
 4 Pastorelli C., Design of an analog-digital converter based on a piecewise linear ramp for image sensor with calibration techniques, These de Doctorat, 15 December 2016
 
 5 Renaud G., Pipeline ADC Built-In Self Test, These de Doctorat, 29 November 2016
 
 6 Andraud M., Solutions for the self-adaptation of wireless systems, These de Doctorat, 14 June 2016
 
 7 Dimakos A., Built-in test in RF circuits using non-intrusive sensors, These de Doctorat, 29 March 2016
 
 8 Fei R., Alternative solution to improve the production test of optical sensors in CMOS technology, These de Doctorat, 13 October 2015
 
 9 Stratigopoulos H., Test techniques for Analog Circuits and Systems, HDR, 17 July 2015
 
10 Ekobo Akoa B., Error detection and concealment integrated in a video decoder using technics of statistical analysis, These de Doctorat, 31 October 2014
 
11 Bousquet L., Enriched high level model generation for heterogeneous and multiphysic systems, These de Doctorat, 29 January 2014
 
12 Laraba A., Design-For-Test of pipeline Analog-to-Digital Converters, These de Doctorat, 20 Septembre 2013
 
13 Alhakim R., Optimizing the performance of sensor networks by controlling synchronization in ultra-wideband systems, These de Doctorat, 29 January 2013
 
14 Abdallah L., Non-intrusive embedded sensors for testing RF circuits, These de Doctorat, 22 October 2012
 
15 Cenni F., High level modeling of heterogeneous systems, analog/digital interfacing, These de Doctorat, 6 April 2012
 
16 Huang K., Fault modeling and diagnosis for nanometric mixed-signal/RF circuits, These de Doctorat, 16 November 2011
 
17 Akkouche N., Optimisation of the production test of analog and RF circuit using statistical modeling techniques, These de Doctorat, 9 Septembre 2011
 
18 Khereddine R., Adaptive logical control and test of AMS/RF circuits, These de Doctorat, 7 Septembre 2011
 
19 Arthaud Y., Design of a monitoring MEMS sensor for middle ear surgery, These de Doctorat, 19 July 2011
 
20 Dubois M., Methodology for test metrics estimation - Application to a new BIST for sigma-delta converters, These de Doctorat, 23 June 2011
 
21 Tounsi F., MEMS Electrodynamic Microphone in CMOS technology: design, modeling and realization, These de Doctorat, 22 March 2010
 
22 Asquini A., A BIST technique for RF frequency synthesizers, These de Doctorat, 22 January 2010
 
23 Tongbong J., Design and evaluation of a bist technique for RF LNA, These de Doctorat, 7 December 2009
 
24 Nguyen H.N., Alternative test technique for RF MEMS switch, These de Doctorat, 6 July 2009
 
25 Lizarraga L., BIST technique for CMOS imagers, These de Doctorat, 27 November 2008
 
26 Rufer L., ELECTROACOUSTIC AND ULTRASOUND TRANSDUCERS: FROM MACRO- TO MICRO-SYSTEMS, HDR, 16 November 2007
 
27 Bounceur A., CAT platform for mixed signal testing, These de Doctorat, 13 April 2007
 
28 Rolindez L., A BIST technique for Sigma-Delta ADCs, These de Doctorat, 23 February 2007
 
29 Dhayni A., Pseudorandom Built-In Self-Test for microsystems, These de Doctorat, 14 November 2006
 
30 Prenat G., Design of a programmable analog and mixed-signal BIST architecture in deep submicron technology, These de Doctorat, 18 November 2005
 
31 Simeu E., Off-Line and On-Line BIST for Embedded Systems, HDR, 22 Septembre 2005
 
32 Mir S., Design and Integrated Test of Analogue, Mixed-Signal and Microsystems Devices, HDR, 18 May 2005
 
33 Domingues C., Design of micromachined acoustic transducers, These de Doctorat, 29 April 2005
 
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