Robust Integrated Systems

Research topics

photo RIS

RIS addresses the fundamental challenges induced by aggressive nanometric scaling, including: high defect densities caused by increasing process, voltage and temperature variations, accelerated aging, EMI and soft errors; as well as stringent power constraints imposed by fast increasing power densities and temperatures, and battery-life requirements in mobile applications.
To address these challenges, the RIS group works at multiple levels of system architecture for developing robust design approaches (and tools for their qualification), including: circuit, bloc, microarchitecture, array-level, and software. Our goals are multiple, and concern the development and use of self-healing and self-adapting approaches for: mitigating fabrication faults (in particular those induced by process variations), to improve fabrication yield; mitigating field failures (in particular those induced by aging) to increase product lifetime, as well as those induced by voltage and temperature variations, EMI and soft errors to improve reliability; operating the circuits at aggressively low voltage levels to aggressively reduce power.

Team leader


Last publications

Charif A., Zergainoh N.-E., Coelho A., Nicolaidis M., Rout3D: A Lightweight Adaptive Routing Algorithm for Tolerating Faulty Vertical Links in 3D-NoCs, 22th IEEE European Test Symposium (ETS'17), pp. 1-6, Limassol, CYPRUS, 2017
Fraire J., Feldmann M., Burleigh S., Benefits and Challenges of Cross-Linked Ring Road Satellite Networks: A Case Study, IEEE International Conference on Communications (ICC'17), Paris, FRANCE, 2017
Vargas V., Software approach to improve the reliability of parallel applications implemented on multi-core and many-core processors, These de Doctorat, 2017
Ramos P., Evaluation of the SEE sensitivity and methodology for error rate prediction of applications implemented in Multi-core and Many-core processors, These de Doctorat, 2017
Clemente J.A., Hubert G., Franco F., Villa F., Baylac M., Mecha H., Puchner H., Velazco R., Sensitivity Characterization of a COTS 90-nm SRAM at Ultra Low Bias Voltage, IEEE Transactions on Nuclear Science, Ed. IEEE, Vol. PP, No. 99, DOI: 10.1109/TNS.2017.2682984, 2017
Annual activity report