Research

RIS

Robust Integrated Systems
since 2015


Research topics

photo RIS

RIS addresses the fundamental challenges induced by aggressive nanometric scaling, including: high defect densities caused by increasing process, voltage and temperature variations, accelerated aging, EMI and soft errors; as well as stringent power constraints imposed by fast increasing power densities and temperatures, and battery-life requirements in mobile applications.
To address these challenges, the RIS group works at multiple levels of system architecture for developing robust design approaches (and tools for their qualification), including: circuit, bloc, microarchitecture, array-level, and software. Our goals are multiple, and concern the development and use of self-healing and self-adapting approaches for: mitigating fabrication faults (in particular those induced by process variations), to improve fabrication yield; mitigating field failures (in particular those induced by aging) to increase product lifetime, as well as those induced by voltage and temperature variations, EMI and soft errors to improve reliability; operating the circuits at aggressively low voltage levels to aggressively reduce power.

Team leader

VELAZCO Raoul

Last publications

Vargas V., Ramos P., Velazco R., Evaluation by Neutron Radiation of the NMR-MPar Fault-Tolerance Approach Applied to Applications Running on a 28-nm Many-Core Processor, Electronics Letters, Ed. IEEE, Vol. 7, No. 11, DOI: 10.3390/electronics7110312, 2018
 
Charif A., Coelho A., Ebrahimi M., Bagherzadeh N., Zergainoh N.-E., First-Last: A Cost-Effective Adaptive Routing Solution for TSV-Based Three-Dimensional Networks-on-Chip, IEEE Transactions on Computers, Ed. IEEE, Vol. 67, No. 10, pp. 1430-1444, DOI: 10.1109/TC.2018.2822269, 2018
 
Franco F., Clemente J.A., Mecha H., Velazco R., Influence of Randomness during the Interpretation of Results from Single-Event Experiments on SRAMs (Early Access), IEEE Transactions on Device and Materials Reliability, Vol. , DOI: 10.1109/TDMR.2018.2886358, 2018
 
Papavramidou P., Nicolaidis M., Iterative Diagnosis Approach for ECC-based Memory Repair (Early Access), IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Ed. IEEE, Vol. , DOI: 10.1109/TCAD.2018.2887052, 2018
 
Vargas V., Ramos P., Méhaut J-F., Velazco R., NMR-Mpar: A Fault-Tolerance Approach for Multi-Core and Many-Core Processors, Applied Sciences, Ed. MDPI, Vol. , DOI: 10.3990/app8030465, 2018
 
Annual activity report