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Flexible and Executable Hardware/Software Interface Modeling for Multiprocessor SoC Design Using SystemC

Author(s): P. Gerin, H. Shen, A. Chureau, A. Bouchhima, A. A. Jerraya

ISRN: TIMA-RR--06/11-01--FR

At high abstraction level, Multi-Processor System-On-Chip (SoC) designs are specified as assembling of IPs which can be Hardware or Software. The refinement of communication between these different IPs, known as hardware/software interfaces, is widely seen as the design bottlneck due to their complexity. In order to perform early design validation and architecture exploration, flexible executable models of these interfaces are needed at different abstraction levels. In this paper, we define a unified methodology to implement executable models of the hardware/software interface based on SystemC. The proposed formalism based on the concept of services gives to this approach the flexibility needed for architecture exploration and the ability to be used in automatic generation tools. A case study of hardware/software interface modeling at the Transaction Accurate level is presented. Experimental results show that this method allows higher simulation speed with early performance estimation.