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Towards Agile Hardware Designs with Chisel: a Network Use-case

Author(s): J. Bruant, P.H. Horrein, O. Muller, T. Groleat, F. Pétrot

Journal: IEEE Design & Test

Doi : 10.1109/MDAT.2021.3063339

Facing Distributed Denial-of-Service (DDoS) attacks that are growing in both number and intensity, cloud service providers' network stability is at stake. Mitigation systems must provide highly responsive lines of defense while handling terabits per second. Combining reconfigurability with guaranteed throughput and latency, FPGAs are recognized targets for high-speed network applications. Although traditional hardware development flows struggle to be responsive, hardware construction languages (HCLs) bring new opportunities to hardware development. This article showcases how Chisel HCL unleashes the power of agile development methodologies through three successive development iterations of a hash-table, a core network processing module in OVHcloud mitigation systems.