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Seeking Low-power Synchronous/Asynchronous Systems: A FIR Implementation Case Study

Author(s): A. Skaf, J. Simatic, L. Fesquet

Doc. Source: IEEE International Symposium on Circuits and Systems (ISCAS 2017)

Publisher: IEEE

Pages: 1-4

Doi : 10.1109/ISCAS.2017.8050379

Seeking low-power consumption high-performance embedded systems has been at the center of interest for researchers around the world for the last decades, especially with the recent boom of different hand-held battery-operated mobile connected devices. The new trends and needs of faster, smarter and smaller internet connected systems, also known as the IoT, require developing very-low power embedded systems including actuators, sensors and signal processors. In this paper, we focus on the architecture optimization efforts to reduce the required activity using the FIR filter as a demonstration example. The new optimized implementation of the FIR filter was compared with other synchronous and asynchronous FIR filter versions realized using the ALPS framework developed at TIMA laboratory. The obtained FIR architecture exhibits 43% less area and up to 61% power consumption reduction compared to the best previous synchronous implementation. We plan to use these results to improve the automatically generated datapath of the high-level synthesis tool of our framework (ALPS-HLS).