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New approaches towards early dependability evaluation of digital integrated systems

Author(s): R. Leveugle

Doc. Source: 11th IEEE International Design & Test Symposium (IDT'16)

Publisher: Academic Press, London, UK

Integrated embedded systems are increasingly used in many applications, including critical ones. The fast growing Internet-of-Things markets still increase concerns about reliability, safety and security. Circuits made in up-to-date technologies are more sensitive to perturbations, in spite of manufacturing progress, due to the number of functions implemented in a single chip. Malicious attacks are based on creating errors to take the control of a system and/or steal private data. In this context, an increasing number of designers need to take care, early in the design flow, of consequences of soft errors (i.e., errors in the processed data, without physical defect induced in the chip). The usual means for early evaluating dependability is fault injections. Many approaches and tools have been developed. This tutorial will discuss alternative approaches that lead to optimized evaluation durations (and therefore easier iterations) while providing good accuracy. Presented approaches do not require any specific equipment or skill, but just leverage developments made for functional verification.