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A new methodology for implementing a distributed clock management system for low-power design

Author(s): C. Al Khatib, M. Gana, C. Aktouf, L. Fesquet

Doc. Source: Workshop on High Performance Embedded Systems (HiPEAC'15)

Today, energy consumption has become a dominant constraint and a key factor for most integrated circuits development. This challenging constraint needs a continuous work on power management techniques to meet the aggressive energy reduction requirements. Techniques such as clock gating and power gating are widely used to limit power consumption and new approaches on optimizing and improving their implementation are highly required. In this presentation, we introduce a new methodology - based on a set of distributed asynchronous controller - to implement gated-clock applied to an AXI-based system. Implementing such methodology even promising may impact risk development schedule and the overall development process. Hence, using efficient design tools is a required. In this sense, we describe the automated implementation procedure used for this purpose. We will introduce an innovative EDA tool which is used during the implementation flow.