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Adaptive Data Prefetching for High Performance Processors

Author(s): L. Vincent, S. Mancini, H.P. Charles, S. Lesecq

Doc. Source: Workshop at the HIPEAC Conference High Performance Embedded Systems (HPES'15)

Nowadays, one of the main limiting factor in processor development is the increasing speed gap between efficient processing elements and slow main memories. To reduce this limitation, prefetching mechanisms, implemented in memory hierarchy, attempt to predict the future data needed in local memory. However, classical proposed solutions are designed for specific access sequences but lack of efficiency considering irregular and heterogeneous access patterns. Adaptive data prefetching aims to tackle the limitation of existing prefetch solution by self-reconfiguring its parameters according to the dynamic variations in the current access sequence. We propose to use a modeling of the main existing access patterns and an on-line monitoring of the access sequence to detect and trigger the data prefetching.