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Design of a 96-dB audio Sigma-Delta ADC including a BIST technique for SNDR testing

Author(s): L. Rolindez, S. Mir, J.L. Carbonero

Doc. Source: 21st Conference on Design of Circuits and Integrated Systems (DCIS’06)

This paper presents the design of a 0.13 µµµµm CMOS SDSDSDSD Analogue-to-Digital Converter (ADC) which includes a self-testing capability for the measure of the Signal-to-Noise-plus-Distortion Ratio (SNDR). The converter is composed of a 2nd order switched-capacitor SDSDSDSD modulator, an internal bandgap reference circuit, a 4-stage digital decimation filter and additional Built-In Self-Test (BIST) circuitry. The circuit is clocked at 12.288 MHz which produces an Over-Sampling Ratio (OSR) higher than 256 for audio signals (up to 22.05 kHz). Transistor-level simulation shows a converter SNDR greater than 96-dB in the audio bandwidth. The BIST technique implemented in the design uses as stimulus a binary stream which encodes a high-precision analogue test signal. The reuse of the bandgap circuit already existing in the converter makes the analogue overhead area very small. The output response analysis is performed by means of a sine-wave fitting algorithm. The reuse of the digital filter already existing in the converter allows us to generate a synchronised reference signal necessary for the fitting-algorithm. Therefore, the digital overhead area is dramatically reduced. Simulation results show the capacity of this strategy to measure the SNDR. The BIST technique is equivalent to a standard test carried out with a sinusoidal signal at -12 dBFS.