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On-chip test signal generation for acoustic and ultrasound microelectronic interfaces

Author(s): S. Mir, C. Diedrich, C. Roman, C. Domingues

Doc. Source: 8th IEEE International Mixed-Signal Testing Workshop (IMSTW'02)

Publisher: IEEE

Pages: 137-144

Low-cost testing of Analogue and Mixed-Signal (AMS) cores requires avoiding the use of expensive AMS testers. Testing AMS cores using a digital tester can be achieved by generating on-chip, from digital seeds, the analogue test signals for the core cells and by producing output digital signatures from the cells response. In this paper, we will focus on the on-chip analogue test signal generation. In our study, we are limited to the case of cells working from a few tens of Hz up to a few tens of MHz since we plan to design a generic AMS core for interfacing acoustic and ultrasound sensors. Note that testing audio circuits for deep sub-micron technologies is exprected to be a major challenge when they are combined with large numbers of noisy digital circuits. At this stage, we have focused our attention towards the generation of DC and single tone analogue signals. We will first review previous work before detailing the actual realization of the on-chip test generation strategy. The strategy is new evaluated by simulation and a first version of a CAD tool useful for defining the digital test patterns required is illustrated. Finally, we will conclude with a summary of our current and future work.