Publications

PhD Thesis


< back to PhD thesis

« Power-Intent Management During RTL Optimizations ».

Author: A. Kalsing
Advisor: L. Fesquet
Co-advisor: C. Aktouf
President of jury: Fr. Pecheux
thesis reviewer(s): P. Girard , Ph. Coussy,
These de Doctorat Université Grenoble Alpes
Speciality: Nanoélectronique et Nanotechnologies
Defense: July 11 2019
ISBN: 978-2-11-129256-7

Abstract

Meeting the requirements of low-power design is a real challenge in the semiconductor industry. In the past few years, new methodologies such as the IEEE-1801 have been introduced to help engineers dealing with the growing complexity of chip design. While enabling many improvements in low-power design, verification and implementation, the standard also introduces new challenges, in particular its integration into existing design flows.
This thesis proposes two methodologies to cope with one such challenge, preserving a correct power-intent during RTL design optimizations. First, we present a consistency check methodology highly correlating UPF (IEEE-1801) and Hardware Description Languages (HDL) in order to track inconsistencies. Finally, we propose a comprehensive automation methodology preserving a consistent power-intent, reflecting the modifications of the design through transformations on the power-intent.