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« Design of asynchronous and distributed controllers for power management ».

Author: C. Al Khatib
Advisor: L. Fesquet
Co-advisor: G. Sicard
President of jury: P. Girard
thesis reviewer(s): N. Julien, B. Allard,
thesis examinator(s): C. Chevalier,
These de Doctorat Université Grenoble Alpes
Speciality: Micro et Nano Electronique
Defense: March 01 2016
ISBN: 978-2-11-129209-3

Abstract

Today integrated system requirements are more and more dealing with low power and energy efficiency constraints. These issues have to be early addressed in the design flow in order to reduce design time and avoid as much as possible iterations. In the framework of the collaborative HiCool project - with the laboratories LIRMM and TIMA, and the companies, Defacto, Docea and ST Microelectronics - a design strategy and its associated design flow has been developed in order to enhance low power characteristics of integrated circuits and ease the reuse of existing hardware blocks (IPs). The proposed approach in this PhD thesis fits into this strategy by integrating a small amount of asynchrony in completely synchronous systems. Indeed, the power reduction is based on the observation that permanently stimulating the entire circuit is unnecessary in many cases. However, controlling the activity with techniques such as "clock gating" or "power gating" usually needs to redesign the system and to add circuitry for activating the blocks that really processing the data. The work, presented in this manuscript, provides a new strategy based on asynchronous distributed clock and power domain controllers that can easily be inserted at a very low redesign cost.

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