PhD Thesis

< back to PhD thesis

« Formalizing On Chip Communications in a Functional Style ».

Author: J. Schmaltz
Advisor: D. Borrione
These de Doctorat Université Joseph-Fourier - Grenoble I
Speciality: Micro et Nano Electronique
Defense: January 31 2006
ISBN: ISBN 2-84813-079-2
Pages: 202


This thesis presents a formal model that represents any on-chipcommunication architecture. This model is described mathematically by a function, named GeNoC. The correctness of GeNoC is expressed as a theorem, which states that messages emitted on the architecture reach their expected destination without any modification of their content. The model identifies the key constituents common to all communication architectures and their essential properties, from which the proof of the GeNoC theorem is deduced. Each constituent is represented by a function, which has no explicit definition, but that is constrained to satisfy the essential properties. Thus, the validation of a particular architecture is reduced to the proof that its concrete definition satisfies the essential properties. In practice, the model has been defined in the logic of the ACL2 theorem proving system. We defined a methodology that yields a systematic approach to the validation of communication architectures at a high level of abstraction. To validate our approach, we exhibit several architectures that constitute concrete instances of the generic model GeNoC. Some of these applications come from industrial designs, such as the AMBA AHB bus or the Octagon network from ST Microelectronics.

pdf pdf

Other localisation