Research
AMfoRS
Architectures and Methods for Resilient Systems
Research topics
- Multi-level specification and verification of hardware/software on-chip architectures: formal and semi-formal approaches
- System-level modeling, analysis and testing
- Dependability of integrated systems: fault detection/tolerance, on-line monitoring, self-adapting and self-healing circuits
- Dependability evaluations: fault injections and alternatives (analytical or formal approaches), prediction of ageing effects on lifetime
- Security of integrated systems: cryptographic accelerators, counter-measures against hardware attacks
The AMfoRS team targets crucial challenges regarding resilient integrated
systems. Our goal is twofold: guarantee that systems will not behave unexpectedly and ensure a substantial level of robustness and security. Our
work aims at increasing the synergies between verification technologies and
activities on the design and validation of reliable, safe and secure integrated
systems, with a focus on digital parts.
The expected outcomes of our research include methods, tools and hardware blocks necessary to justify trust in increasingly complex integrated systems and even cyber-physical systems.
The team takes part in several scientific challenges identified not only at the laboratory level, but also in the Research "poles" of University Grenoble-Alpes (especially the MSTIC pole) and more generally at the national level (French strategic directions) and international level (in particular European H2020 priorities).
The expected outcomes of our research include methods, tools and hardware blocks necessary to justify trust in increasingly complex integrated systems and even cyber-physical systems.
The team takes part in several scientific challenges identified not only at the laboratory level, but also in the Research "poles" of University Grenoble-Alpes (especially the MSTIC pole) and more generally at the national level (French strategic directions) and international level (in particular European H2020 priorities).
Team leader
LEVEUGLE RégisLast publications
Anghel L., Benabdenbi M., Bosio A., Vatajelu I., Test and reliability in approximate computing, Mixed Signals Testing Workshop (IMSTW'17), Thessaloniki, GREECE, DOI: 10.1109/IMS3TW.2017.7995210, Invited paper, 2017
Vatajelu I., Anghel L., Reliability Analysis of MTJ-based Functional Module for Neuromorphic Computing, International Symposium on On-Line Testing and Robust System Design (IOLTS'17), Thessaloniki, GREECE, 2017
Vatajelu I., Rodriguez-Montanes R., Renovell M., Figueras J., Mitigating Read & Write Errors in STT-MRAM Memories under DVS, European Test Symposium (ETS'17), Limassol, CYPRUS, 2017
Portolan M., Barragan M., Alhakim R., Mir S., Mixed-Signal BIST computation offloading using IEEE 1687, European Test Symposium (ETS'17), Limassol, CYPRUS, 2017
Vatajelu I., Prinetto P., Taouil M., Hamdioui S., Challenges and Solutions in Emerging Memory Testing, IEEE Transactions on Emerging Topics in Computing, Ed. IEEE, Vol. PP, No. 99, DOI: 10.1109/TETC.2017.2691263, 2017
