Research
AMfoRS
Architectures and Methods for Resilient Systems
since 2015
Research topics
- Multi-level specification and verification of hardware/software on-chip architectures: formal and semi-formal approaches
- System-level modeling, analysis and testing
- Dependability of integrated systems: fault detection/tolerance, on-line monitoring, self-adapting and self-healing circuits
- Dependability evaluations: fault injections and alternatives (analytical or formal approaches), prediction of ageing effects on lifetime
- Security of integrated systems: cryptographic accelerators, counter-measures against hardware attacks
The AMfoRS team targets crucial challenges regarding resilient integrated
systems. Our goal is twofold: guarantee that systems will not behave unexpectedly and ensure a substantial level of robustness and security. Our
work aims at increasing the synergies between verification technologies and
activities on the design and validation of reliable, safe and secure integrated
systems, with a focus on digital parts.
The expected outcomes of our research include methods, tools and hardware blocks necessary to justify trust in increasingly complex integrated systems and even cyber-physical systems.
The team takes part in several scientific challenges identified not only at the laboratory level, but also in the Research "poles" of University Grenoble-Alpes (especially the MSTIC pole) and more generally at the national level (French strategic directions) and international level (in particular European H2020 priorities).
The expected outcomes of our research include methods, tools and hardware blocks necessary to justify trust in increasingly complex integrated systems and even cyber-physical systems.
The team takes part in several scientific challenges identified not only at the laboratory level, but also in the Research "poles" of University Grenoble-Alpes (especially the MSTIC pole) and more generally at the national level (French strategic directions) and international level (in particular European H2020 priorities).
Last publications
Ait Said N., Benabdenbi M., Villanova Novaes Magalhaes G., Prototypage Matériel-Logiciel de Systèmes Intégrés avec l'architecture RISC-V, J3eA – Journal sur l’enseignement des sciences et technologies de l’information et des systèmes, Ed. EDP Sciences, France, Vol. 18, No. Numéro spécial, 2019
Portolan M., The Automated Test Flow, the Present and the Future, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Ed. IEEE, Vol. , DOI: 10.1109/TCAD.2019.2961328, 2019
Valea E., Da Silva M., Flottes M.-L., Di Natale G., Rouzeyre B., Stream vs block ciphers for scan encryption, Microelectronics journal, Ed. Elsevier, Vol. 86, pp. 65-76, DOI: 10.1016/j.mejo.2019.02.019, 2019
Galy P., De Conti L., Delahaye G., Anghel L., Topology and design investigation on thin film silicon BIMOS device for ESD protection in FD-SOI technology, Microelectronics Reliability, Ed. Elsevier, Vol. , DOI: 10.1016/j.microrel.2019.06.069, 2019
Anghel L., Shah R., Cacho F., On-Chip Ageing Monitoring and System Adaptation, Ageing of Integrated Circuits: Causes, Effects and Mitigation TechniquesOn-Chip Ageing Monitoring and System Adaptation, B. Halak (Eds.) , Ed. , pp. 149-180, DOI: 10.1007/978-3-030-23781-3_6, 2019
