21st International Mixed-Signal Testing Workshop
Catalunya, Spain
Hotel Eden RocBaie de Sant FeliuWackelsteinSant Feliu de Guixols casino
Hotel Eden Roc, Sant Feliu de Guíxols
July 4-6, 2016
under the umbrella of
1st Federative Event on Design for Robustness

Call for Papers

The role of nano-electronic systems is rapidly expanding in every facet of modern life. To interact with environment and users the Integrated Circuits need analog, mixed-signal, RF or MEMS blocks. These blocks could represent a low part of the chip area but have a major impact on IC Yield and reliability. Indeed, one of the major bottlenecks nowadays for nano-electonics systems is the post-manufacturing testing of their analog, mixed-signal, RF, and MEMS functions, in order to guarantee outgoing quality while not sacrificing yield. Testing such functions is accounting for a large portion of the overall manufacturing cost.

The main reasons include the pressing demand for zero defective parts-per-million, the increasing frequency of operation, the high levels of integration, the limited controllability and observability of embedded blocks, the integration of heterogeneous devices onto the same substrate, the requirement for specialized, high-cost equipment, the new defect mechanisms and excessive process variations occurring in advance technology nodes, the long test times, etc.

In addition to the post-manufacturing testing problem, modern safety-critical, mission-critical, and remote-controlled systems need to be equipped with self-test, concurrent error detection, and fault-tolerance capabilities so as to detect early reliability hazards and guarantee reliable operation even in harsh environments.

For such systems, diagnosing the sources of failures occurring in the field of operation is of vital importance, in order to apply corrective actions and to prevent failure reoccurrence.

The International Mixed-Signal Testing Workshop (IMSTW) is one of the main forums that bring together analog, mixed-signal, RF, and MEMS the test community to discuss ideas and views on the above challenges. The scope of the workshop includes, but is not limited to, the following topics:

  • Test generation
  • Fault modeling and simulation
  • Test metrics estimation
  • Self-healing and self-adaptation
  • Built-in self-test
  • Design-for-test
  • Fault diagnosis
  • Failure analysis
  • Defect characterization
  • ATE technology
  • Economics of test and yield optimization
  • On-line test
  • Fault tolerance
  • Reliability and design-for-reliability

Submissions: Submissions should be via the workshop web-site and consist of either an extended summary of at least 750 words or preferably a complete 6-page paper. The workshop will produce electronic formal proceedings with an ISBN number which will be submitted for acceptance into the IEEE Xplore digital library.

A selection of papers will be invited to a special issue of Springer Journal of Electronic Testing: Theory and Applications (JETTA).

Relevant Dates

Key dates

Submission deadline:March 25, 2016 April 8, 2016 Extended submission deadline
Notification of acceptance:May 13, 2016
Camera-ready full papers:June 03, 2016
General Information Program Information
Serge Bernard Manuel Barragan William Eisenstadt
Montpellier, France Grenoble, France Florida USA, France
Tel: +33 (0) 4 67 41 86 66 Tel: +33 (0) 4 76 57 46 81 Tel: +1 352-392-4946

Download the Call for Papers PDF file